Evaluating the impact of microenterprise credit programs on women in Bangladesh

Thesis (M.C.P.)--Massachusetts Institute of Technology, Dept. of Urban Studies and Planning, 1996.Includes bibliographical references (leaves 58-60).by Rumana Huque.M.C.P

Women and the Federation of Disability Organizations in Malawi:Experiences of struggle and solidarity

Women with disabilities are among the most marginalised members of the Federation of Disability Organizations in Malawi (FEDOMA), facing particular challenges related to sexual and gender-based violence and family/home life; women with disabilities are both abused because of their embodied womanhood and denied many socially-valued “traditional women’s roles.” However, women within Malawi’s disability rights movement transgress the boundaries of these social restraints. In this article, I share stories of women disability activists, drawn from an interview and participant observation-based project, co-designed with FEDOMA to explore the experiences of grassroots activists. In telling their stories, the women of FEDOMA detailed processes of empowerment and change, combatting their own and others’ experiences of violence, abuse, and exclusion. I discuss the ways in which women activists embodied roles that altered their communities and built activist networks, supporting one another in expressing agency, strength, and solidarity. Their work highlights a politics of care that emphasises the “traditional” and the “modern,” incorporating individualised human rights discourse into an ethics of community caring and expanding this collective inclusion to the oppressed and marginalised. In focusing on the experiences of Malawi’s women disability activists, we gain a more complex understanding of mechanisms of marginalisation, resistance, and empowerment.</p

NSEC5, DNSSEC authenticated denial of existence

The Domain Name System Security Extensions (DNSSEC) introduced two resource records (RR) for authenticated denial of existence: the NSEC RR and the NSEC3 RR. This document introduces NSEC5 as an alternative mechanism for DNSSEC authenticated denial of existence. NSEC5 uses verifiable random functions (VRFs) to prevent offline enumeration of zone contents. NSEC5 also protects the integrity of the zone contents even if an adversary compromises one of the authoritative servers for the zone. Integrity is preserved because NSEC5 does not require private zone-signing keys to be present on all authoritative servers for the zone, in contrast to DNSSEC online signing schemes like NSEC3 White Lies.https://datatracker.ietf.org/doc/draft-vcelak-nsec5/First author draf

A High-Temperature, High-Voltage SOI Gate Driver Integrated Circuit with High Drive Current for Silicon Carbide Power Switches

High-temperature integrated circuit (IC) design is one of the new frontiers in microelectronics that can significantly improve the performance of the electrical systems in extreme environment applications, including automotive, aerospace, well-logging, geothermal, and nuclear. Power modules (DC-DC converters, inverters, etc.) are key components in these electrical systems. Power-to-volume and power-to-weight ratios of these modules can be significantly improved by employing silicon carbide (SiC) based power switches which are capable of operating at much higher temperature than silicon (Si) and gallium arsenide (GaAs) based conventional devices. For successful realization of such high-temperature power electronic circuits, associated control electronics also need to perform at high temperature. In any power converter, gate driver circuit performs as the interface between a low-power microcontroller and the semiconductor power switches. This dissertation presents design, implementation, and measurement results of a silicon-on-insulator (SOI) based high-temperature (\u3e200 _C) and high-voltage (\u3e30 V) universal gate driver integrated circuit with high drive current (\u3e3 A) for SiC power switches. This mixed signal IC has primarily been designed for automotive applications where the under-hood temperature can reach 200 _C. Prototype driver circuits have been designed and implemented in a Bipolar-CMOS- DMOS (BCD) on SOI process and have been successfully tested up to 200 _C ambient temperature driving SiC switches (MOSFET and JFET) without any heat sink and thermal management. This circuit can generate 30V peak-to-peak gate drive signal and can source and sink 3A peak drive current. Temperature compensating and temperature independent design techniques are employed to design the critical functional units like dead-time controller and level shifters in the driver circuit. Chip-level layout techniques are employed to enhance the reliability of the circuit at high temperature. High-temperature test boards have been developed to test the prototype ICs. An ultra low power on-chip temperature sensor circuit has also been designed and integrated into the gate-driver die to safeguard the driver circuit against excessive die temperature (_ 220 _C). This new temperature monitoring approach utilizes a reverse biased p-n junction diode as the temperature sensing element. Power consumption of this sensor circuit is less than 10 uW at 200 _C

DEVELOPMENT AND IMPLEMENTATION OF THE COGDRISK DEMENTIA RISK ASSESSMENT TOOL AND INTERACTIVE WEBSITE

We developed a comprehensive risk assessment tool for dementia – Cognitive Health and Dementia Risk Assessment (CogDrisk) and a version specifically for Alzheimer’s disease called CogDrisk-AD that could be applicable in low and high-resource settings. This tool incorporates risk and protective factors identified through systematic synthesis of observational studies that report risk ratios. Risk and protective factors included in the tool were selected on the strength of evidence as well as the availability of measures that are practicable in a range of clinical and research contexts. Seventeen risk/protective factors were identified for inclusion in the dementia algorithm to estimate the risk of dementia while sixteen factors were identified for the AD model, with an overlap in the majority of the factors. CogDrisk and the CogDrisk-AD were predictive of dementia and AD when validated across four high-quality international cohort studies. To enable the CogDrisk tool to be implemented in practice our team has developed an interactive website where individuals 18 years and above can complete the CogDrisk questionnaire, obtain a personalised risk profile, and receive feedback on their risk profile. The website was developed with the capacity to collect and store data. We anticipate that the tool can be used by members of the public, in clinical settings and as a screening or outcome measure for clinical trials

Achieving Pull-in Avoiding Cycle Slip Using Second-order PLLs

Synchronization is an essential process and one of the first tasks of the receiver in case of coherent communications as well synchronous digital data transfer. The phase lock loop (PLL), which employs the error tracking technique, has been a very popular way to implement this synchronizer since the early 1930s. A phenomenon called cycle slip occurs when the number of cycles present in the transmitted carrier (clock) differs from that of the recovered carrier (clock) at the receiver. The cycle slip can be very detrimental to some applications such as frequency modulated communications systems (FSK, multi-carrier etc.), burst digital data transfer, training pulse retrieval, and so on. This paper presents a remedy to avoid the cycle slip by using properly designed second-order Type II PLL.DOI:http://dx.doi.org/10.11591/ijece.v4i2.504

Interval Hysterectomy for Placenta Percreta – a Case Report

Introduction: Placenta percreta is an abnormality of placentation where it invades the serosa and can go beyond it. Complications include massive hemorrhage, bladder dysfunction, and severe infections during delivery.  The aim of this study is to report a complex case of placenta percreta managed by interval hysterectomy.Case presentation: Pre-operative: 34 years old patient with previous three cesarean sections was followed in antenatal clinic. She came with repeated bouts of vaginal bleeding at 30-31 weeks. At 32 weeks and 4 days classical cesarean section was done with placenta left in situ. Prophylactic bilateral internal iliac artery balloon was inserted. Post cesarean section, uterine artery embolization was performed. Post-operative: Clinical features of pulmonary embolism (PE) developed about 4 hours later. Post-Operative Day 13: Total abdominal hysterectomy was done. After few days of discharge, the patient presented to the emergency department with shortness of breath. She was consequently diagnosed with chronic pulmonary embolism and treated with warfarin.Conclusion: This is a case of placenta percreta managed by interval hysterectomy. However, the most widely accepted method of management is cesarean hysterectomy. In this case, interval hysterectomy was done due to the possibility of bladder invasion by placenta, to decrease the amount of blood loss and to reduce the number of days stayed in hospital. Appropriate management for the patient must be personalized, whether it is by cesarean hysterectomy or interval hysterectomy,  as each has risks and benefits