A time of arrival estimator based on multiple timestamps for digital PET detectors

Recent fully digital CMOS detectors suggested for PET can feature multiple on-chip TDCs. In these detectors, the timestamps of up to virtually all detected scintillation photons can be stored for later processing. However, the improvement in timing resolution that these multiple timestamps can provide strongly depends on the estimator (i.e. the post-processing algorithm) used. In this work, we propose an estimator that utilizes the timestamps of the first few photons to obtain a single time of arrival for the gamma event. The estimator is to be implemented in an FPGA for real-time coincidence detection, and thus aims at low computational complexity. The estimator performance was evaluated through Monte Carlo simulations of a scintillation with double exponential pulse shape and a photodetector with Gaussian jitter. The results of a LYSO scintillator coupled to a 250 ps jitter FWHM detector with 1000 detected photons per scintillation show that our estimator provides around 10% improvement over a single photon estimator

A mini-SiPM array for PET detectors implemented in a 0.35-um HV CMOS technology

A new architecture for Positron Emission Tomography visible-light detectors is presented. The architecture is based on mini-SiPMs (arrays of 32 SPADs), which are locally digitized. With this architecture we expect to achieve a high fill factor while still performing an early enough analog-to-digital conversion so as to avoid interconnect parasitics common of standard SiPMs. The detector is implemented as a 14 × 10 pixel array where each pixel contains a mini-SiPM, a digital counter and individual SPAD SRAMs for disabling high DCR devices. The achieved fill factor is 29% and the expected maximum event rate is 16 kcps

Toward the development of a fully CMOS Single-Photon Detector for PET systems: a Montecarlo simulator as an optimization tool to support the sensor design

A Zemax/Matlab Monte Carlo (MC) simulator of a gamma detector module for PET applications is presented. The simulator models the optical arrangement and the photodetector based on CMOS Single-Photon Avalanche Diodes (SPADs). The simulator serves as a tool for optimization of the detector configuration, as it allows the designers to evaluate different sensor configurations and find the one that maximizes the signal-to-noise ratio (SNR). Three sensor configurations have been tested, employing SPADs with a diameter of 8 µm, 16 µm and 32 µm. Results show that 16 um-wide devices lead to the best trade-off between fill factor and noise

A fully digital 8×16 SiPM array for PET applications with per-pixel TDCs and real-time energy output

A 8×16 pixel array based on CMOS small area Silicon Photomultipliers (mini-SiPMs) detectors for PET applications is reported. Each pixel is 570 × 610 µm2 in size and contains 4 digital mini-SiPMs, for a total of 720 SPADs, resulting in a full chip fill-factor of 35.7%. For each gamma detection, the pixel provides the total detected energy and a timestamp, obtained through two 7b counters and two 12b 64ps TDCs. An adder tree overlaid on top of the pixel array sums the sensor total counts at up to 100 Msamples/s, which are then used for detecting the asynchronous gamma events on-chip, while also being output in real-time. Characterization of gamma detection performance with an 3×3×5 mm3 LYSO scintillator at 20o C is reported, showing a 511 keV gamma energy resolution of 10.9% and a coincidence timing resolution of 399 ps

Complete characterization of SPADnet-I - a digital 8×16 SiPM array for PET applications

The paper presents the complete gamma characterization of the SPADnet-I sensor, a novel, fully digital SiPM array for PET applications. Each SPADnet-I pixel contains 720 SPADs and counting and timestamping logic, resulting in pixel dimensions of 0.6 × 0.6 mm2 and 42.6% fill-factor. Moreover, the sensor provides a real-time output of the total detected energy at up to 100 Msamples/s, which is internally used by a discriminator to distinguish gamma events from background noise. Results for the pile-up identification, crystal image and discriminator efficiency are presented. An energy resolution of 10.9% and a coincidence resolution time of 399 ps were obtained

SPADnet: A Fully Digital, Networked Approach to MRI Compatible PET Systems Based on Deep-Submicron CMOS Technology

This paper is the first comprehensive presentation of the SPADnet concept. SPADnet is a fully digital, networked MRI compatible time-of-flight PET system, exploiting the speed and integration density of deep-submicron CMOS technologies. The core technologies of SPADnet are a sensor tile comprising an array of 16x32 mini-SiPM pixels with in situ time-to-digital conversion, a multi-ring network to filter, carry, and process data produced by the sensors at 2Gbps, and a 130nm CMOS process enabling mass-production of photonic modules that are optically interfaced to scintillator crystals. The SPADnet photonic modules comprise 25 tightly packed sensor tiles; each module is networked in multiple rings, where coincidence pairs are identified and readily used in reconstruction algorithms, enabling scalable, MRI compatible preclinical PET systems for multi-modal imaging