Design of Touch Screen Controller IC for Transparent Fingerprint Sensor

Department of Electrical EngineeringA design of system architecture and analog-front-end (AFE) with high SNR and high frame rate for mutual capacitive touch screen with multiple electrodes is presented. Firstly, a differential continuous-mode parallel operation architecture (DCPA) is proposed for large-sized TSP. The proposed architecture achieves a high product of signal-to-noise ratio (SNR) and frame rate, which is a requirement of ROIC for large-sized TSP. DCPA is accomplished by using the proposed differential sensing method with a parallel architecture in a continuous-mode. A continuous-type differential charge amplifier removes the common-mode noise component, and reduces the self-noise by the band-pass filtering effect of the continuous-mode charge amplifier. In addition, the differential parallel architecture cancels the timing skew problem caused by the continuous-mode parallel operation and effectively enhances the power spectrum density of the signal. The proposed ROIC was fabricated using a 0.18-um CMOS process and occupied an active area of 1.25 mm2. The proposed system achieved a 72 dB SNR and 240 Hz frame rate with a 32 channel TX by 10 channel RX mutual capacitive TSP. Moreover, the proposed differential-parallel architecture demonstrated higher immunity to lamp noise and display noise. The proposed system consumed 42.5 mW with a 3.3-V supply. Secondly, readout IC (ROIC) with a differential coded multiple signaling method (DCMS) is proposed to detect an atto-farad capacitance difference for fingerprint recognition in fingerprint TSP. A readout IC with high SNR and fast frame rate are required in the fingerprint recognition. However, the capacitance difference by the ridge and valley of the fingerprint is very small, so that the signal-to-noise ratio is very low. In addition, it takes long time to scan whole fingerprint TSP with multiple electrodes. A fully differential architecture with differential signaling is proposed to detect the low capacitance difference in fingerprint TSP. The internal noise generated is minimized by 2nd fully differential operational amplifier and external noise is eliminated by a lock-in sensing structure. In addition, DCMS reduces an AC offset and enhances a higher product of SNR and frame rate in multiple channels. The proposed architectures can distinguish a 50-atto-farad which is a capacitance difference resulted from the ridges and valley of the finger under the 0.3T glass. The total scan time for 42 ?? 42 fingerprint TSP is less than 21 ms and the power consumption is below 20 mW at 3.3 V supply voltage. IC has been fabricated using a 0.18 ??m standard CMOS process.ope

Quantitative local probing of polarization with application on HfO 2 ‐based thin films

Owing to their switchable spontaneous polarization, ferroelectric materials have been applied in various fields, such as information technologies, actuators, and sensors. In the last decade, as the characteristic sizes of both devices and materials have decreased significantly below the nanoscale, the development of appropriate characterization tools became essential. Recently, a technique based on conductive atomic force microscopy (AFM), called AFM‐positive‐up‐negative‐down (PUND), is employed for the direct measurement of ferroelectric polarization under the AFM tip. However, the main limitation of AFM‐PUND is the low frequency (i.e., on the order of a few hertz) that is used to initiate ferroelectric hysteresis. A significantly higher frequency is required to increase the signal‐to‐noise ratio and the measurement efficiency. In this study, a novel method based on high‐frequency AFM‐PUND using continuous waveform and simultaneous signal acquisition of the switching current is presented, in which polarization–voltage hysteresis loops are obtained on a high‐polarization BiFeO3 nanocapacitor at frequencies up to 100 kHz. The proposed method is comprehensively evaluated by measuring nanoscale polarization values of the emerging ferroelectric Hf0.5Zr0.5O2 under the AFM tip

Development of Kinematic 3D Laser Scanning System for Indoor Mapping and As-Built BIM Using Constrained SLAM

The growing interest and use of indoor mapping is driving a demand for improved data-acquisition facility, efficiency and productivity in the era of the Building Information Model (BIM). The conventional static laser scanning method suffers from some limitations on its operability in complex indoor environments, due to the presence of occlusions. Full scanning of indoor spaces without loss of information requires that surveyors change the scanner position many times, which incurs extra work for registration of each scanned point cloud. Alternatively, a kinematic 3D laser scanning system, proposed herein, uses line-feature-based Simultaneous Localization and Mapping (SLAM) technique for continuous mapping. Moreover, to reduce the uncertainty of line-feature extraction, we incorporated constrained adjustment based on an assumption made with respect to typical indoor environments: that the main structures are formed of parallel or orthogonal line features. The superiority of the proposed constrained adjustment is its reduction for uncertainties of the adjusted lines, leading to successful data association process. In the present study, kinematic scanning with and without constrained adjustment were comparatively evaluated in two test sites, and the results confirmed the effectiveness of the proposed system. The accuracy of the 3D mapping result was additionally evaluated by comparison with the reference points acquired by a total station: the Euclidean average distance error was 0.034 m for the seminar room and 0.043 m for the corridor, which satisfied the error tolerance for point cloud acquisition (0.051 m) according to the guidelines of the General Services Administration for BIM accuracy

Highly improved SNR differential sensing method using parallel operation signaling for touch screen application

In this paper, a continuous-time differential type multi-signal parallel driving architecture touch screen sensing circuit for projective capacitive type panel is presented. In order to further enhance the Signal-to-Noise Ratio (SNR), a new transmitter (TX) architecture is proposed with parallel signal processing algorithm. In this work, charge amplifiers with built-in band-pass filter are designed that filter out low frequency noise and common-mode noise simultaneously. Conventional approaches in continuous-time operation with band-pass filter suffer from a synchronization problem in the case of multi-signal parallel driving. In this work, a built-in delay calibration circuit is proposed that can align signal timing for TX signal and adjacent receiver (RX) sensing line. This proposed architecture enables multi-signal parallel driving in continuous-time operation for projective capacitive sensing circuits. The proposed work supports 16 ?? 8 mutual capacitive touch screen panel (TSP). TSP load is 12.5 k?? and 40 pF with frame rate of 200 Hz and 58 dB SNR. Power dissipation is 46 mW

Dynamic range enhanced readout circuit for a capacitive touch screen panel with current subtraction technique

A dynamic range enhanced readout circuit using current subtraction technique is presented for a capacitive touch screen panels. A low-voltage, analog front-end circuit using a high-voltage input signal is implemented. A high voltage (> 10 V) parallel pulse signal is used as the transmitter signal. The receiver system was designed with low voltage (<; 5 V). A current-subtraction circuit (CSC) with a current mirror and switches is proposed to improve the signal-to-noise ratio (SNR). SNR is improved by removing excessive current from the touch screen panel. High-voltage parallel signaling method is used to further enhance the dynamic range. Dynamic range was increased by a factor of four and reduced the feedback capacitance from 20 to 5 pF. The proposed IC was implemented in a TSMC 0.18-??m high-voltage CMOS process. The power consumption of the chip is 11.2 mW and the chip size is 2.5 mm ?? 2.5 mm

Algorithm for improving snr using high voltage and differential manchester code for capacitive touch screen panel

An algorithm for a capacitive touch screen panel that can make the sum of the signal into '0' for the use of high voltage is presented. The differential Manchester code is combined with the Walsh-Hadamard code to generate an input coded signal. Owing to the property of the differential Manchester code, the Moore-Penrose pseudoinverse matrix is employed to decode-mutual capacitance from the received signal. As only the variation between the un-touch and touch condition is detected at the receiver, a high-voltage input coded signal is used. Unlike a normal touch system, the decoded sensing capacitance in the proposed algorithm does not have an absolute value. Positive decoded capacitance is the un-touch condition and negative decoded capacitance is the touch condition. The simulated signal-to-noise ratio (SNR) of the proposed algorithm is 27.9 dB, which is 8.26 dB higher than SNR in not return to zero (NRZ).close0

Evaluating the Vertical Extension Module of a Building with Installed Rotary Dampers at Joints

In this study, the shape of a vertical expansion module with a rotary-type damping device is proposed. The external energy dissipation capacity is confirmed through experiments and the performance of the module is simulated. It can be easily applied to high-rise structures, as the module is directly supported by the bearing walls without the need for a separate base system. Additionally, as the damper can be replaced, it is possible to enhance seismic performance even after construction. The simulation results show that the rotary-type damper is more effective in reducing the displacement, shear force, and moment than free and fixed joints. In the pushover analysis of a system modeled using the moment hinge of the rotary damper of the joint, the best response reduction effect is obtained when the yield moment of the hinge is defined as 1% of the frame plastic moment. As a result of the analysis of the multi-degree-of-freedom system considering a harmonic load, we determined that it is efficient for the hinge to yield after the displacement, and the acceleration response of the resonant structure reaches steady state during the installation. In the multi-degree-of-freedom system with slab joints added to the analytical model, the displacement response decreased gradually as the natural period of the structure decreased and the joint increased. This provides evidence that the damper does not affect the overall behavior of the structure. The most important design factor of the rotary-type friction damper, shown through the experiment, is the relationship between the frictional surface and the tightening force of the bolt

Differential Coded Multiple Signaling Method with Fully Differential Receiver for Mutual Capacitive Fingerprint TSP

This paper presents a fingerprint mutual capacitive touchscreen panel (TSP) readout IC, which uses a differential coded multiple signaling (DCMS) method. A readout IC with high SNR and fast frame rate is required for fingerprint recognition. However, achieving high SNR is challenging owing to the limited capacitance difference originating from the small depth variations between the ridges and valleys of the fingerprint. In addition, scanning the entire fingerprint TSP with multiple electrodes is time-consuming. A fully differential receiver with DCMS is proposed to detect the low capacitance difference in a fingerprint TSP. The internal noise is minimized by the low-noise amplifier, and external noise is eliminated by a lock-in sensing architecture. In addition, DCMS reduces the offset and enhances the SNR while achieving faster frame rate in multiple channels. The proposed architecture can detect capacitance of 50 aF, which is the capacitance difference resulting from the ridges and valleys of a finger under a 0.3-mm-thick (T) cover glass. The readout IC achieves 15.1-dB peak-to-peak SNR and 23-Hz frame rate with a transparent mutual capacitive fingerprint TSP under 0.3T glass. The power consumption is below 21 mW at 3.3-V supply voltage. The IC was fabricated using a 0.18- ${\mu }\text{m}$ standard CMOS process