Combining photonic crystal and optical Monte Carlo simulations: implementation, validation and application in a positron emission tomography detector

This paper presents a novel approach towards incorporating photonic crystals (PhCs) into optical Monte Carlo (MC) simulations. This approach affords modeling the full diffractive nature of PhCs including their reflection and transmission behavior as well as the manipulation of the photon trajectories through light scattering. The main purpose of this tool is to study the impact of PhCs on the light yield and timing performance of scintillator-based detectors for positron emission tomography (PET). To this end, the PhCs are translated into look-up tables and implemented into the optical MC algorithm. Our simulations are validated in optical experiments using PhC samples fabricated with electron beam lithography. The experimental results indicate that the simulations match the measurements within the accuracy of the experiments. The application of the combined simulation technique to a PET detector module predicts an increase of the total light yield by up to 23% for PhC coatings versus the reference without PhCs. Timing calculations reveal an improvement of the coincident resolving time by up to 6%. The results underline the potential of PhCs to improve light yield and timing of PET detector modules

High performance 3D interconnects based on electrochemical etch and liquid metal fill

Besides the usually known TSV technologies to etch and fill Si interconnects there is a powerful photo-assisted electrochemical etch technology for fine pitch TSV, which goes hand in hand with a liquid fill metallization. Both together allow the generation of high density wiring on and through thick self-carrying interposers, where other technologies fail. Together with any etching technology the liquid fill technology allows an extremely simple process flow to realize conductor lines inside buried channels. Taking the right material combinations there is very low stress inside the substrate, which allows a high design freedom for larger via or systematic aligned via. Using the fill technology for stacked dies an extremely simple and compact 3D wiring is possible. It is less complex than conventional ones since it does not need any seed layer or additional balls between chips. The fill technology has the potential of complete wiring of multichip systems