Performance Analysis of Preemptive Based Uniprocessor Scheduling

All the real-time systems are bound with response time constraints, or else, there is a risk of  severe consequences, which includes failure. The System will fail when not able to meet the requirements according to the specifications. The problem of real-time scheduling is very vast, ranging from uni-processor to complicated-multiprocessor. In this paper, we have compared the performance of real-time tasks that should be scheduled properly, to get optimum performance. Analysis methodology and the concept of optimization leads to the design of appropriate scheduling. We have done  the analysis among RM and EDF algorithm that are important for scheduling in uni-processor

A buffer placement algorithm to overcome short-circuit power dissipation in mesh based clock distribution network

In the recent past, Mesh-based clock distribution has received interest due to their tolerance to process variations in deep-sub micron technology. Mesh buffers are placed on the mesh to drive the large load capacitance of clock sinks and mesh wire capacitance. In this paper, we propose a buffer placement algorithm which can overcome the short circuit power dissipated in clock meshes. Our buffer placement algorithm uses clustering technique to judiciously place buffers such that short-circuit power is minimized while minimizing skew at the same time. This is verified by Monte carlo simulations incorporating process, voltage and systemic variations in NGSPICE