Minimal sets determining universal and phase-covariant quantum cloning

We study the minimal input sets which can determine completely the universal and the phase-covariant quantum cloning machines. We find that the universal quantum cloning machine, which can copy arbitrary input qubit equally well, however can be determined completely by only four input states located at the four vertices of a tetrahedron. The phase-covariant quantum cloning machine, which can copy all qubits located on the equator of the Bloch sphere, can be determined by three equatorial qubits with equal angular distance. These results sharpen further the well-known results that BB84 states and six-states used in quantum cryptography can determine completely the phase-covariant and universal quantum cloning machines. This concludes the study of the power of universal and phase-covariant quantum cloning, i.e., from minimal input sets necessarily to full input sets by definition. This can simplify dramatically the testing of whether the quantum clone machines are successful or not, we only need to check that the minimal input sets can be cloned optimally.Comment: 7 pages, 4 figure

GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learning

Automatic transistor sizing is a challenging problem in circuit design due to the large design space, complex performance trade-offs, and fast technological advancements. Although there has been plenty of work on transistor sizing targeting on one circuit, limited research has been done on transferring the knowledge from one circuit to another to reduce the re-design overhead. In this paper, we present GCN-RL Circuit Designer, leveraging reinforcement learning (RL) to transfer the knowledge between different technology nodes and topologies. Moreover, inspired by the simple fact that circuit is a graph, we learn on the circuit topology representation with graph convolutional neural networks (GCN). The GCN-RL agent extracts features of the topology graph whose vertices are transistors, edges are wires. Our learning-based optimization consistently achieves the highest Figures of Merit (FoM) on four different circuits compared with conventional black-box optimization methods (Bayesian Optimization, Evolutionary Algorithms), random search, and human expert designs. Experiments on transfer learning between five technology nodes and two circuit topologies demonstrate that RL with transfer learning can achieve much higher FoMs than methods without knowledge transfer. Our transferable optimization method makes transistor sizing and design porting more effective and efficient.Comment: Accepted to the 57th Design Automation Conference (DAC 2020); 6 pages, 8 figure