A method for precise charge reconstruction with pixel detectors using binary hit information

A method is presented to precisely reconstruct charge spectra with pixel detectors using binary hit information of individual pixels. The method is independent of the charge information provided by the readout circuitry and has a resolution mainly limited by the electronic noise. It relies on the ability to change the detection threshold in small steps while counting hits from a particle source. The errors are addressed and the performance of the method is shown based on measurements with the ATLAS pixel chip FE-I4 bump bonded to a 230 {\mu}m 3D-silicon sensor. Charge spectra from radioactive sources and from electron beams are presented serving as examples. It is demonstrated that a charge resolution ({\sigma}<200 e) close to the electronic noise of the ATLAS FE-I4 pixel chip can be achieved

Neutron irradiation test of depleted CMOS pixel detector prototypes

Charge collection properties of depleted CMOS pixel detector prototypes produced on p-type substrate of 2 k$\Omega$cm initial resistivity (by LFoundry 150 nm process) were studied using Edge-TCT method before and after neutron irradiation. The test structures were produced for investigation of CMOS technology in tracking detectors for experiments at HL-LHC upgrade. Measurements were made with passive detector structures in which current pulses induced on charge collecting electrodes could be directly observed. Thickness of depleted layer was estimated and studied as function of neutron irradiation fluence. An increase of depletion thickness was observed after first two irradiation steps to 1$\cdot$10$^{13}$ n/cm$^{2}$ and 5$\cdot$10$^{13}$ n/cm$^{2}$ and attributed to initial acceptor removal. At higher fluences the depletion thickness at given voltage decreases with increasing fluence because of radiation induced defects contributing to the effective space charge concentration. The behaviour is consistent with that of high resistivity silicon used for standard particle detectors. The measured thickness of the depleted layer after irradiation with 1$\cdot$10$^{15}$ n/cm$^{2}$ is more than 50 $\mu$m at 100 V bias. This is sufficient to guarantee satisfactory signal/noise performance on outer layers of pixel trackers in HL-LHC experiments

Prototype Active Silicon Sensor in 150 nm HR-CMOS Technology for ATLAS Inner Detector Upgrade

The LHC Phase-II upgrade will lead to a significant increase in luminosity, which in turn will bring new challenges for the operation of inner tracking detectors. A possible solution is to use active silicon sensors, taking advantage of commercial CMOS technologies. Currently ATLAS R&D programme is qualifying a few commercial technologies in terms of suitability for this task. In this paper a prototype designed in one of them (LFoundry 150 nm process) will be discussed. The chip architecture will be described, including different pixel types incorporated into the design, followed by simulation and measurement results.Comment: 9 pages, 9 figures, TWEPP 2015 Conference, submitted to JINS

BDAQ53, a versatile pixel detector readout and test system for the ATLAS and CMS HL-LHC upgrades

BDAQ53 is a readout system and verification framework for hybrid pixel detector readout chips of the RD53 family. These chips are designed for the upgrade of the inner tracking detectors of the ATLAS and CMS experiments. BDAQ53 is used in applications where versatility and rapid customization are required, such as in laboratory testing environments, test beam campaigns, and permanent setups for quality control measurements. It consists of custom and commercial hardware, a Python-based software framework, and FPGA firmware. BDAQ53 is developed as open source software with both software and firmware being hosted in a public repository.Comment: 6 pages, 6 figure

Charge collection and efficiency measurements of the TJ-Monopix2 DMAPS in 180 \,nm CMOS technology

Monolithic CMOS pixel detectors have emerged as competitive contenders in the field of high-energy particle physics detectors. By utilizing commercial processes they offer high-volume production of such detectors. A series of prototypes has been designed in a 180$\,$nm Tower process with depletion of the sensor material and a column-drain readout architecture. The latest iteration, TJ-Monopix2, features a large 2$\,$cm x 2$\,$cm matrix consisting of 512 x 512 pixels with 33.04$\,$um pitch. A small collection electrode design aims at low power consumption and low noise while the radiation tolerance for high-energy particle detector applications needs extra attention. With a goal to reach radiation tolerance to levels of $10^{15}\,1\,$MeV n$_\text{eq}\,$cm$^{-2}$ of NIEL damage a modification of the standard process has been implemented by adding a low-dosed n-type silicon implant across the pixel in order to allow for homogeneous depletion of the sensor volume. Recent lab measurements and beam tests were conducted for unirradiated modules to study electrical characteristics and hit detection efficiency.Comment: Conference proceedings for PIXEL2022 conference, submitted to Po

Der ATLAS-Pixelsensor

Das ATLAS Experiment soll ab 2006 Proton-Proton-Kollisionen am Large Hadron Collider (LHC) hochpräzise vermessen, um neue Erkenntnisse im Bereich der Teilchenphysik bei Schwerpunktenergien bis zu 1 TeV und mehr zu liefern. Die technologisch vielleicht anspruchsvollste Komponente des Experimentes stellt der Pixeldetektor dar, der nahe dem Wechselwirkungspunkt eine präzise Spurmessung der bei den Proton-Proton-Kollisionen erzeugten geladenen Elementarteilchen gewährleisten soll. Neben der hohen Wechselwirkungsrate von 40 MHz und der hohen Spurdichte stellt die enorme Strahlenbelastung von bis zu 1015 Teilchen pro Quadratzentimeter (1 MeV Neutron äquivalent), denen alle Komponenten des Pixeldetektor während der geplanten 10-jährigen Betriebszeit ausgesetzt sind, eine wesentliche Anforderung dar. Für den Pixeldetektor wurde ein hybrides Siliziumpixelkonzept gewählt, bei dem der Sensorbaustein und die Ausleseelektronik getrennt gebaut werden und erst in einem weiteren Verarbeitungsschritt (Bump-Bonding) miteinander verbunden werden. Gegenstand der vorliegendes Arbeit ist die Entwicklung des Sensorbausteins des ATLAS Pixeldetektors bis zur Produktionsreife. Die hohen Anforderungen führen dabei zu einem strahlungstoleranten Silizium-Pixelsensor, der bei mehreren hundert Volt und nur teilweise verarmt betrieben werden kann ohne auf eine homogene Ladungssammlung, kleine Pixelzellen oder dünne Sensoren zur Reduzierung der störenden Vielfachstreuung verzichten zu müssen. Weiterhin ist ein Punch-Througk-Biasnetzwerk implementiert worden, um realistische Tests der Pixelsensoren vor der Weiterverarbeitung zu ermöglichen. Die Übertragbarkeit der gewonnenen Erkenntnisse auf zukünftige Sensorentwicklungen auch außerhalb der Teilchenphysik werden diskutiert

Serial powering of pixel modules

Modern pixel detectors for the next generation of high-energy collider experiments like LHC use readout electronics in deep sub- micron technology. Chips in this technology need a low supply voltage of 2-2.5 V alongside high current consumption to achieve the desired performance. The high supply current leads to significant voltage drops in the long and low mass supply cables so that voltage fluctuations at the chips are induced, when the supply current changes. This problem scales with the number of modules when connected in parallel to the power supplies. An alternative powering scheme connects several modules in series resulting in a higher supply voltage but a lower current consumption of the chain and therefore a much lower voltage drop in the cables. In addition the amount of cables needed to supply the detector is vastly reduced. The concept and features of serial powering are presented and studies of the implementation of this technology as an alternative for the ATLAS pixel detector are shown. In particular, it is shown that the potential risk of powering in series can be addressed and eliminated

Realisation of serial powering of ATLAS pixel modules

Modern hybrid pixel detectors as they will be used for the next generation of high energy collider experiments like LHC avail deep sub micron technology for the readout electronics. To operate chips in this technology low supply voltages of 2.0 V to 2.5 V and high currents to achieve the desired performance are needed. Due to the long and low mass supply cables this high current leads to a significant voltage drop so that voltage fluctuations at the chip result, when the supply current changes. Therefore the parallel connection of the readout electronics with the power supplies imposes severe constraints on a detector with respect to voltage fluctuations and cable mass. To bypass this problem a new concept of serially connecting modules in a supply chain was developed. The basic idea of the concept, the potential risk and ways to minimize these risks are presented. In addition, studies of the implementation of this technology as an alternative for a possible upgrade of the ATLAS pixel detector are shown. In particular, it is shown that the operation of several module in a supply chain does not affect the stability, the reliability and the performance of the ATLAS pixel modules