Improving Clock Synchronization Performance in Industrial Networks

The recent advances in cyber-physical systems and industrial internet-of-things (IIoT) have enabled the convergence of information technology (IT) and operational technology (OT) worlds of industrial automation systems achieving higher productivity, reliability, and revenues. The availability of business-critical and production-critical data on the converged network has enabled new and advanced network-centric applications that require time-constrained embedded devices to be connected to “the internet.'' The massively interconnected IIoT devices communicating in real-time require a accurate, scalable, easy-to-deploy, and cost-effective clock synchronization service for the ordering of information collected throughout a network. Thus, a time or clock synchronization service that aligns the devices' clocks in the network to ensure accurate timestamping and orderly event executions, has gained great importance. The industrial networks are heterogeneous in nature, where various grades of hardware resources along with varied software complexities operate in average to extremely harsh and hostile environments. The heterogeneity and the huge number of devices make it challenging to achieve an adequate level of clock synchronization in industrial networks with existing hardware and software-based solutions. For this reason, the thesis aims to enhance the accuracy of the most-economical, highly scalable, and easy-to-deploy software-based clock synchronization in wired industrial networks with the hypothesis that predictive software strategies can compensate for their lack of accuracy. The first step towards this goal is to identify the industrial network characteristics essential for improving clock synchronization. The analysis of real network data from an industrial site confirmed that packet delay variation (PDV) could assure the clock synchronization performance in an industrial network. Using signal processing-based PDV compensation methods, we propose enhanced clock synchronization algorithms, namely, 'CoSiNeT' and 'CoSiWiNet' for local and wide area industrial networks. Based on the analysis in real networks, both algorithms outperform state-of-the-practice and state-of-the-art methods in degrading network scenarios. Once the significance of PDV in synchronization performance has been confirmed, the next step is identifying the network parameters significantly affecting PDV. The thesis provides a network calculus-based PDV analysis of synchronization messages in a multi-stage wired packet-switched network under the presence of stochastic  background traffic. The analysis, based on a closed-form, end-to-end probabilistic analytical model of PDV, identifies the network parameters that significantly affect PDV. It further unveils the significant relationship between PDV incurred by synchronization messages and the rate, burstiness of background network traffic parameters. Bounding the PDV or jitter under a certain level can be beneficial for applications such as synchronization, where PDV is a significant decider of assured performance. A Sigma traffic shaper is proposed to maintain PDV under limits by controlling the rate of incoming background traffic at the ingress port of the network. We further estimate the probability of a synchronization message loss due to the shaper, given the finite buffers available at network stages. The loss probability estimation is a vital trade-off tool that can be utilized to fix the limiting rate for a desired PDV maintenance. Finally, we extend the PDV analysis to predict the probabilistic clock synchronization accuracy bound for given network conditions. The performance analysis conducted with proposed configurations showed that limiting the arrival traffic rate to 50% resulted in PDV levels and in turn synchronization accuracy being reduced from a few milliseconds to a few microseconds

Investigating Software-based Clock Synchronization for Industrial Networks

A rising level of industrialization and advances in Industry 4.0 have resulted in Industrial Internet of Things (IIoT) gaining immense significance in today’s industrial automation systems. IIoT promises to achieve improved productivity, reliability, and revenues by connecting time-constrained embedded systems to “the Internet”. New opportunities bring with them challenges, and in particular for industrial networks, massively interconnected IIoT devices communicating in real-time,  require synchronized operation of devices for the ordering of information collected throughout a  network. Thus,   a   time or clock synchronization service that aligns the devices’ clocks in the network to ensure accurate timestamping and orderly event executions, has gained great importance. Achieving adequate clock synchronization in the industrial domain is challenging due to heterogeneous communication networks and exposure to harsh environmental conditions bringing interference to the communication networks. The investigative study based on existing literature and the envisioned architecture of the future industrial automation system unveils that the key requirements for future industrial networks are to have a cost-effective, accurate, scalable, secured, easy to deploy and maintain clock synchronization solution. Today’s industrial automation systems employ clock synchronization solutions from a wide plethora of hardware and software based solutions. The most economical, highly scalable, maintainable software-based clock synchronization means are best candidates for the identified future requirements as their lack in accuracy compared to hardware solutions could be compensated by predictive software strategies.  Thus, the thesis’s overall goal is to enhance the accuracy of software-based clock synchronization in heterogeneous industrial networks using predictable software strategies. The first step towards developing an accurate clock synchronization for heterogeneous industrial networks with real-time requirements is to investigate communication parameters affecting time synchronization accuracy. Towards this goal, we investigated actual industrial network data for packet delay profiles and their impact on clock synchronization performance.  We further analyzed wired and wireless local area networks to identify key network parameters for clock synchronization and proposed an enhanced clock synchronization algorithm CoSiNeT for field IoT devices in industrial networks. CoSiNeT matches well with state-of-the-practice SNTP and state-of-the-art method SPoT in good network conditions in terms of accuracy and precision;  however,  it outperforms them in scenarios with degrading network conditions

Improving Clock Synchronization Performance in Industrial Networks

The recent advances in cyber-physical systems and industrial internet-of-things (IIoT) have enabled the convergence of information technology (IT) and operational technology (OT) worlds of industrial automation systems achieving higher productivity, reliability, and revenues. The availability of business-critical and production-critical data on the converged network has enabled new and advanced network-centric applications that require time-constrained embedded devices to be connected to “the internet.'' The massively interconnected IIoT devices communicating in real-time require a accurate, scalable, easy-to-deploy, and cost-effective clock synchronization service for the ordering of information collected throughout a network. Thus, a time or clock synchronization service that aligns the devices' clocks in the network to ensure accurate timestamping and orderly event executions, has gained great importance. The industrial networks are heterogeneous in nature, where various grades of hardware resources along with varied software complexities operate in average to extremely harsh and hostile environments. The heterogeneity and the huge number of devices make it challenging to achieve an adequate level of clock synchronization in industrial networks with existing hardware and software-based solutions. For this reason, the thesis aims to enhance the accuracy of the most-economical, highly scalable, and easy-to-deploy software-based clock synchronization in wired industrial networks with the hypothesis that predictive software strategies can compensate for their lack of accuracy. The first step towards this goal is to identify the industrial network characteristics essential for improving clock synchronization. The analysis of real network data from an industrial site confirmed that packet delay variation (PDV) could assure the clock synchronization performance in an industrial network. Using signal processing-based PDV compensation methods, we propose enhanced clock synchronization algorithms, namely, 'CoSiNeT' and 'CoSiWiNet' for local and wide area industrial networks. Based on the analysis in real networks, both algorithms outperform state-of-the-practice and state-of-the-art methods in degrading network scenarios. Once the significance of PDV in synchronization performance has been confirmed, the next step is identifying the network parameters significantly affecting PDV. The thesis provides a network calculus-based PDV analysis of synchronization messages in a multi-stage wired packet-switched network under the presence of stochastic  background traffic. The analysis, based on a closed-form, end-to-end probabilistic analytical model of PDV, identifies the network parameters that significantly affect PDV. It further unveils the significant relationship between PDV incurred by synchronization messages and the rate, burstiness of background network traffic parameters. Bounding the PDV or jitter under a certain level can be beneficial for applications such as synchronization, where PDV is a significant decider of assured performance. A Sigma traffic shaper is proposed to maintain PDV under limits by controlling the rate of incoming background traffic at the ingress port of the network. We further estimate the probability of a synchronization message loss due to the shaper, given the finite buffers available at network stages. The loss probability estimation is a vital trade-off tool that can be utilized to fix the limiting rate for a desired PDV maintenance. Finally, we extend the PDV analysis to predict the probabilistic clock synchronization accuracy bound for given network conditions. The performance analysis conducted with proposed configurations showed that limiting the arrival traffic rate to 50% resulted in PDV levels and in turn synchronization accuracy being reduced from a few milliseconds to a few microseconds

Network Calculus Approach for Packet Delay Variation Analysis of Multi-Hop Wired Networks

The Industrial Internet of Things (IIoT) has revolutionized businesses by changing the way data are used to make products and services more efficient, reliable, and profitable. To achieve the improvement goals, the IIoT must guarantee the real-time performance of industrial applications such as motion control, by providing stringent quality of service (QoS) assurances for their (industrial applications) communication networks. An application or service may malfunction without adequate network QoS, resulting in potential product failures. Since an acceptable end-to-end delay and low jitter or packet delay variation (PDV) are closely related to quality of service (QoS), their impact is significant in ensuring the real-time performance of industrial applications. Although a communication network topology ensures certain jitter levels, its real-life performance is affected by dynamic traffic due to the changing number of devices, services, and applications present in the communication network. Hence, it is essential to study the jitter experienced by real-time traffic in the presence of background traffic and how it can be maintained within the limits to ensure a certain level of QoS. This paper presents a probabilistic network calculus approach that uses moment-generating functions to analyze the delay and PDV incurred by the traffic flows of interest in a wired packet switched multi-stage network. The presented work derives closed-form, end-to-end, probabilistic performance bounds for delay and PDV for several servers in series in the presence of background traffic. The PDV analysis conducted with the help of a Markovian traffic model for background traffic showed that the parameters from the background traffic significantly impact PDV and that PDV can be maintained under the limits by controlling the shape of the background traffic. For the studied configurations, the model parameters can change the PDV bound from 1 ms to 100 ms. The results indicated the possibility of using the model parameters as a shaper of the background traffic. Thus, the analysis can be beneficial in providing QoS assurances for real-time applications

CoSiWiNeT: A Clock Synchronization Algorithm for Wide Area IIoT Network

Recent advances in the industrial internet of things (IIoT) and cyber–physical systems drive Industry 4.0 and have led to remote monitoring and control applications that require factories to be connected to remote sites over wide area networks (WAN). The adequate performance of remote applications depends on the use of a clock synchronization scheme. Packet delay variations adversely impact the clock synchronization performance. This impact is significant in WAN as it comprises wired and wireless segments belonging to public and private networks, and such heterogeneity results in inconsistent delays. Highly accurate, hardware–based time synchronization solutions, global positioning system (GPS), and precision time protocol (PTP) are not preferred in WAN due to cost, environmental effects, hardware failure modes, and reliability issues. As a software–based network time protocol (NTP) overcomes these challenges but lacks accuracy, the authors propose a software–based clock synchronization method, called CoSiWiNeT, based on the random sample consensus (RANSAC) algorithm that uses an iterative technique to estimate a correct offset from observed noisy data. To evaluate the algorithm’s performance, measurements captured in a WAN deployed within two cities were used in the simulation. The results show that the performance of the new algorithm matches well with NTP and state–of–the–art methods in good network conditions; however, it outperforms them in degrading network scenarios

Future Industrial Networks in Process Automation: Goals, Challenges, and Future Directions

There are many initiatives and technologies working towards implementing factories of the future. One consensus is that the classical hierarchical automation system design needs to be flattened while supporting the functionality of both Operation Technology (OT) and Information Technology (IT) within the same network infrastructure. To achieve the goal of IT/OT convergence in process automation, an evolutionary transition is preferred. Challenges are foreseen during the transition, mainly caused by the traditional automation architecture, and the main challenge is to identify the gap between the current and future network architectures. To address the challenges, in this paper, we describe one desired future scenario for process automation and carry out traffic measurements from a pulp and paper mill. The measured traffic is further analyzed, which reveals representative traffic characteristics in the process automation. Finally, the key challenges and future directions towards a system architecture for factories of the future are presented