30 research outputs found
The Path to Health Information Technology Adoption: How Far Have We Reached?
Health Information Technology (HIT) is an overarching framework that describes the management of health information across various computerized systems and the secure exchange between consumers, providers, government, and insurers. It has been viewed as a promising tool for improving the overall quality, safety and efficiency of the health delivery system (Chaudhry et al., 2006). This capstone examines the problem of urban rural divide in the process of Health IT adoption especially with regard to Electronic Health Records (EHRs). This paper also tracks the progress made during years 2009 to 2013 to the process of Electronic Health Record adoption in the United States
Coreset Clustering on Small Quantum Computers
Many quantum algorithms for machine learning require access to classical data
in superposition. However, for many natural data sets and algorithms, the
overhead required to load the data set in superposition can erase any potential
quantum speedup over classical algorithms. Recent work by Harrow introduces a
new paradigm in hybrid quantum-classical computing to address this issue,
relying on coresets to minimize the data loading overhead of quantum
algorithms. We investigate using this paradigm to perform -means clustering
on near-term quantum computers, by casting it as a QAOA optimization instance
over a small coreset. We compare the performance of this approach to classical
-means clustering both numerically and experimentally on IBM Q hardware. We
are able to find data sets where coresets work well relative to random sampling
and where QAOA could potentially outperform standard -means on a coreset.
However, finding data sets where both coresets and QAOA work well--which is
necessary for a quantum advantage over -means on the entire data
set--appears to be challenging
Trustworthy Quantum Computation through Quantum Physical Unclonable Functions
Quantum computing is under rapid development, and today there are several
cloud-based, quantum computers (QCs) of modest size (>100s of physical qubits).
Although these QCs, along with their highly-specialized classical support
infrastructure, are in limited supply, they are readily available for remote
access and programming. This work shows the viability of using intrinsic
quantum hardware properties for fingerprinting cloud-based QCs that exist
today. We demonstrate the reliability of intrinsic fingerprinting with real QC
characterization data, as well as simulated QC data, and we detail a quantum
physically unclonable function (Q-PUF) scheme for secure key generation using
unique fingerprint data combined with fuzzy extraction. We use fixed-frequency
transmon qubits for prototyping our methods
Optimized Compilation of Aggregated Instructions for Realistic Quantum Computers
Recent developments in engineering and algorithms have made real-world
applications in quantum computing possible in the near future. Existing quantum
programming languages and compilers use a quantum assembly language composed of
1- and 2-qubit (quantum bit) gates. Quantum compiler frameworks translate this
quantum assembly to electric signals (called control pulses) that implement the
specified computation on specific physical devices. However, there is a
mismatch between the operations defined by the 1- and 2-qubit logical ISA and
their underlying physical implementation, so the current practice of directly
translating logical instructions into control pulses results in inefficient,
high-latency programs. To address this inefficiency, we propose a universal
quantum compilation methodology that aggregates multiple logical operations
into larger units that manipulate up to 10 qubits at a time. Our methodology
then optimizes these aggregates by (1) finding commutative intermediate
operations that result in more efficient schedules and (2) creating custom
control pulses optimized for the aggregate (instead of individual 1- and
2-qubit operations). Compared to the standard gate-based compilation, the
proposed approach realizes a deeper vertical integration of high-level quantum
software and low-level, physical quantum hardware. We evaluate our approach on
important near-term quantum applications on simulations of superconducting
quantum architectures. Our proposed approach provides a mean speedup of
, with a maximum of . Because latency directly affects the
feasibility of quantum computation, our results not only improve performance
but also have the potential to enable quantum computation sooner than otherwise
possible.Comment: 13 pages, to apper in ASPLO
Optimized Surface Code Communication in Superconducting Quantum Computers
Quantum computing (QC) is at the cusp of a revolution. Machines with 100
quantum bits (qubits) are anticipated to be operational by 2020
[googlemachine,gambetta2015building], and several-hundred-qubit machines are
around the corner. Machines of this scale have the capacity to demonstrate
quantum supremacy, the tipping point where QC is faster than the fastest
classical alternative for a particular problem. Because error correction
techniques will be central to QC and will be the most expensive component of
quantum computation, choosing the lowest-overhead error correction scheme is
critical to overall QC success. This paper evaluates two established quantum
error correction codes---planar and double-defect surface codes---using a set
of compilation, scheduling and network simulation tools. In considering
scalable methods for optimizing both codes, we do so in the context of a full
microarchitectural and compiler analysis. Contrary to previous predictions, we
find that the simpler planar codes are sometimes more favorable for
implementation on superconducting quantum computers, especially under
conditions of high communication congestion.Comment: 14 pages, 9 figures, The 50th Annual IEEE/ACM International Symposium
on Microarchitectur
Hardware-Conscious Optimization of the Quantum Toffoli Gate
While quantum computing holds great potential in several fields including
combinatorial optimization, electronic structure calculation, and number
theory, the current era of quantum computing is limited by noisy hardware. Many
quantum compilation approaches, including noise-adaptive compilation and
efficient qubit routing, can mitigate the effects of imperfect hardware by
optimizing quantum circuits for objectives such as critical path length. Few of
these approaches, however, consider quantum circuits in terms of the set of
vendor-calibrated operations (i.e., native gates) available on target hardware.
In this paper, we review and expand both analytical and numerical methodology
for optimizing quantum circuits at this abstraction level. Additionally, we
present a procedure for combining the strengths of analytical native gate-level
optimization with numerical optimization. We use these methods to produce
optimized implementations of the Toffoli gate, a fundamental building block of
several quantum algorithms with near-term applications in quantum compilation
and machine learning. This paper focuses on the IBMQ native gate set, but the
methods presented are generalizable to any superconducting qubit architecture.
Our analytically optimized implementation demonstrated a reduction in
infidelity compared with the canonical implementation as benchmarked on IBM
Jakarta with quantum process tomography. Our numerical methods produced
implementations with six multi-qubit gates assuming the inclusion of
multi-qubit cross-resonance gates in the IBMQ native gate set, a
reduction from the canonical eight multi-qubit implementation for
linearly-connected qubits. These results demonstrate the efficacy of native
gate-level optimization of quantum circuits and motivate further research into
this topic.Comment: 21 page
QContext: Context-Aware Decomposition for Quantum Gates
In this paper we propose QContext, a new compiler structure that incorporates
context-aware and topology-aware decompositions. Because of circuit equivalence
rules and resynthesis, variants of a gate-decomposition template may exist.
QContext exploits the circuit information and the hardware topology to select
the gate variant that increases circuit optimization opportunities. We study
the basis-gate-level context-aware decomposition for Toffoli gates and the
native-gate-level context-aware decomposition for CNOT gates. Our experiments
show that QContext reduces the number of gates as compared with the
state-of-the-art approach, Orchestrated Trios.Comment: 10 page