Probability hypothesis density filter with adaptive parameter estimation for tracking multiple maneuvering targets

AbstractThe probability hypothesis density (PHD) filter has been recognized as a promising technique for tracking an unknown number of targets. The performance of the PHD filter, however, is sensitive to the available knowledge on model parameters such as the measurement noise variance and those associated with the changes in the maneuvering target trajectories. If these parameters are unknown in advance, the tracking performance may degrade greatly. To address this aspect, this paper proposes to incorporate the adaptive parameter estimation (APE) method in the PHD filter so that the model parameters, which may be static and/or time-varying, can be estimated jointly with target states. The resulting APE-PHD algorithm is implemented using the particle filter (PF), which leads to the PF-APE-PHD filter. Simulations show that the newly proposed algorithm can correctly identify the unknown measurement noise variances, and it is capable of tracking multiple maneuvering targets with abrupt changing parameters in a more robust manner, compared to the multi-model approaches

CLR: Channel-wise Lightweight Reprogramming for Continual Learning

Continual learning aims to emulate the human ability to continually accumulate knowledge over sequential tasks. The main challenge is to maintain performance on previously learned tasks after learning new tasks, i.e., to avoid catastrophic forgetting. We propose a Channel-wise Lightweight Reprogramming (CLR) approach that helps convolutional neural networks (CNNs) overcome catastrophic forgetting during continual learning. We show that a CNN model trained on an old task (or self-supervised proxy task) could be ``reprogrammed" to solve a new task by using our proposed lightweight (very cheap) reprogramming parameter. With the help of CLR, we have a better stability-plasticity trade-off to solve continual learning problems: To maintain stability and retain previous task ability, we use a common task-agnostic immutable part as the shared ``anchor" parameter set. We then add task-specific lightweight reprogramming parameters to reinterpret the outputs of the immutable parts, to enable plasticity and integrate new knowledge. To learn sequential tasks, we only train the lightweight reprogramming parameters to learn each new task. Reprogramming parameters are task-specific and exclusive to each task, which makes our method immune to catastrophic forgetting. To minimize the parameter requirement of reprogramming to learn new tasks, we make reprogramming lightweight by only adjusting essential kernels and learning channel-wise linear mappings from anchor parameters to task-specific domain knowledge. We show that, for general CNNs, the CLR parameter increase is less than 0.6\% for any new task. Our method outperforms 13 state-of-the-art continual learning baselines on a new challenging sequence of 53 image classification datasets. Code and data are available at https://github.com/gyhandy/Channel-wise-Lightweight-ReprogrammingComment: ICCV 202

Building One-class Detector for Anything: Open-vocabulary Zero-shot OOD Detection Using Text-image Models

We focus on the challenge of out-of-distribution (OOD) detection in deep learning models, a crucial aspect in ensuring reliability. Despite considerable effort, the problem remains significantly challenging in deep learning models due to their propensity to output over-confident predictions for OOD inputs. We propose a novel one-class open-set OOD detector that leverages text-image pre-trained models in a zero-shot fashion and incorporates various descriptions of in-domain and OOD. Our approach is designed to detect anything not in-domain and offers the flexibility to detect a wide variety of OOD, defined via fine- or coarse-grained labels, or even in natural language. We evaluate our approach on challenging benchmarks including large-scale datasets containing fine-grained, semantically similar classes, distributionally shifted images, and multi-object images containing a mixture of in-domain and OOD objects. Our method shows superior performance over previous methods on all benchmarks. Code is available at https://github.com/gyhandy/One-Class-AnythingComment: 16 pages (including appendix and references), 3 figure

Comprehensive Identification of Protein Substrates of the Dot/Icm Type IV Transporter of Legionella pneumophila

A large number of proteins transferred by the Legionella pneumophila Dot/Icm system have been identified by various strategies. With no exceptions, these strategies are based on one or more characteristics associated with the tested proteins. Given the high level of diversity exhibited by the identified proteins, it is possible that some substrates have been missed in these screenings. In this study, we took a systematic method to survey the L. pneumophila genome by testing hypothetical orfs larger than 300 base pairs for Dot/Icm-dependent translocation. 798 of the 832 analyzed orfs were successfully fused to the carboxyl end of β-lactamase. The transfer of the fusions into mammalian cells was determined using the β-lactamase reporter substrate CCF4-AM. These efforts led to the identification of 164 proteins positive in translocation. Among these, 70 proteins are novel substrates of the Dot/Icm system. These results brought the total number of experimentally confirmed Dot/Icm substrates to 275. Sequence analysis of the C-termini of these identified proteins revealed that Lpg2844, which contains few features known to be important for Dot/Icm-dependent protein transfer can be translocated at a high efficiency. Thus, our efforts have identified a large number of novel substrates of the Dot/Icm system and have revealed the diverse features recognizable by this protein transporter

Invariant Structure Learning for Better Generalization and Causal Explainability

Learning the causal structure behind data is invaluable for improving generalization and obtaining high-quality explanations. We propose a novel framework, Invariant Structure Learning (ISL), that is designed to improve causal structure discovery by utilizing generalization as an indication. ISL splits the data into different environments, and learns a structure that is invariant to the target across different environments by imposing a consistency constraint. An aggregation mechanism then selects the optimal classifier based on a graph structure that reflects the causal mechanisms in the data more accurately compared to the structures learnt from individual environments. Furthermore, we extend ISL to a self-supervised learning setting where accurate causal structure discovery does not rely on any labels. This self-supervised ISL utilizes invariant causality proposals by iteratively setting different nodes as targets. On synthetic and real-world datasets, we demonstrate that ISL accurately discovers the causal structure, outperforms alternative methods, and yields superior generalization for datasets with significant distribution shifts.Comment: 16 pages (including Appendix), 4 figure

Specially-Designed Out-of-Order Processor Architecture for Microcontrollers

In very large-scale integration circuit (VLSI) systems, microcontrollers are often implanted to manage the whole system to complete the given computing tasks. They play an essential part as regulators, which should allocate resources steadily and issue instructions promptly to drive functional units. However, most of the recent research focuses on the operation at the software level or the scheduling at the SoC level, ignoring the impact of the microarchitecture and the features of controlled sub-modules. This paper analyzes the requirements of microcontrollers in the VLSI system with various constraints and conditions that should be considered in the hardware implementation of such microarchitecture. Furthermore, this paper takes an open-source design using RISC-V ISA as the prototype to implement hardware microarchitecture. This design integrates the techniques of out-of-order processing, which are usually used on superscalar processors. As a result, the design quadruples the number of pipelined instructions, greatly alleviating the stalling of the instruction stream with a maximum extra look up table utilization of 18.37% in FPGA implementation