Metal-Free Disordered Vertical Sub-Micron Silicon Wires Produced from Electrochemical p-Type Porous Silicon Layers

In this paper, we propose a simple, original and costless method to produce monocrystalline silicon sub-micron wires by electrochemical etching of silicon wafers. For this purpose, 30-50 Omega cm p-type silicon samples were etched in a HF (50 wt %):H2O:acetic acid (4.63:1.45:2.14) electrolyte applying various current densities. As the resulting material is made of macroporous silicon filled with mesoporous silicon, when a slight KOH or TMAH etching is performed, we are able to produce vertical wires with an aspect ratio up to 500. The thinnest measured wire diameters are about 200 nm for an average wire density above 10(7) cm(-2).Peer reviewe

Porous Silicon/Silicon Hybrid Substrate Applied to the Monolithic Integration of Common-Mode and Bandpass RF Filters

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P Type Porous Silicon Resistivity and Carrier Transport

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Supercritically-Dried Porous Silicon Powders with Surface Areas Exceeding 1000 M2/G

International audiencePorous silicon micro-particulates have been harvested after electrochemical anodization of lightly-doped p-type silicon wafers in hydrofluoric acid electrolyte containing sulfuric acid as an additive. Post-anodization, significantly higher internal surface areas per unit mass have been realized by utilizing super-critical drying with CO2 solvent instead of air-drying, with up to 1125 m2/g being achieved. Correspondingly higher pore volumes are also evident (>1 cm3/g) and, with average pore diameters ranging between 3–4 nm, a higher micropore content is made accessible. It is proposed that the improvements achieved through super-critical drying indicate that the higher density of micropores expected from the choice of wafer resistivity and electrolyte composition (their presence being confirmed through analysis of the adsorption-desorption isotherms) is facilitated through a higher degree of integrity being maintained within the etched pore structure during electrolyte removal

Evaluation of Mesoporous Silicon Substrates Strain for the Integration of Radio Frequency Circuits

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Macroporous Silicon Electrochemical Etching for Gas Diffusion Layers Applications : Effect of Processing Temperature

MEMS technology requires low cost techniques to permit large scale fabrication for production. Porous silicon (PS) can be used in different manner to replace standard expensive etching techniques like DRIE (Deep Reactive Ion Etching). To perform same process quality as the latter, one need to understand how different parameters can influence porous silicon properties. We investigate here local formation of macroporous silicon on 2D and 3D silicon substrates. The blank substrate is a low doped (26–33 Ω cm) n type 6 inches silicon wafer. Then, an in situ phosphorus-doped polycrystalline silicon (N+ Poly-Si) is deposited on a thermal oxide layer to delimit the regions to be etched. Porous silicon is obtained afterwards using electrochemical anodization in a hydrofluoric acid (HF) solution. The effect of the temperature process on Si-HF electrochemical system voltamperometric curves, macropores morphology and electrochemical etch rates is more specifically studied. Moreover, permeation of porous substrates to hydrogen is studied after various anodization post-treatments such as KOH and HF wet etching or after a thin gold layer deposition used as current collector in micro fuel cells

Investigation of Porous Silicon-Based Edge Termination for Planar-Type TRIAC

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Determination of microscopic parameters of piezoceramic materials under electrical loading using genetic algorithm

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