Automated virtual prototyping for fastest time-to-market of new system in package solutions

A modular system of parametric FE models is created using ANSYS parametric design language (APDL) for automated virtual prototyping of current and future System-inPackage (SiP) solutions based on fan-out-wafer-level-packaging (FOWLP) technologies. The principles of the hierarchical architecture are described and instructive examples are given for all levels, i.e., from the part models to the four demonstrator packages. Further, the results of first simulations addressing the typical load case of temperature cycling between - 40 °C and 125 °C clearly demonstrate the validity of the approach as they agree to the experimental finding. The system of models is now applicable to a large variety of future SiP products based on FOWLP. It will allow virtual prototyping, i.e., replace time consuming experimental tests during the product definition phase

Assessment of FOWLP process dependent wafer warpage using parametric FE study

The paper presents the steps for the parametric finite element model creation of the wafer, material characterization of the adhesive tape, analytical and finite element study of the wafer warpage considering the bifurcation, gravity effect on the wafer bow assessing the warpage of mold/Si bilayered structure under thermal loading. The analytical results are compared to finite element analyses (FEA) considering the linear and nonlinear deflection. Consequently, the FEA approach has been used to study the deformation of 12” reconstituted wafers in their FOWLP fabrication process. By changing the temperature, the deformation of the wafer shows a bifurcation point, at which the warpage changes between the spherical and cylindrical shapes. The bifurcation region has been analyzed for the relevant range of overmold thicknesses in order to provide the guidance to optimum wafer and process designs that avoid the excessive warpage. For different wafer structures, the study determines also the effects of the gravitational force on the wafer bow as well as its influence in combination with the thermal mismatch. Finally, the FOWLP process induced warpage has been demonstrated by FEA incorporating the geometrical nonlinearity, gravity and ground support by means of contact elements

Intrinsic stress measurement by FIB ion milling becomes an industrial-strength method

Intrinsic stresses in semiconductor and MEMS devices significantly affect functional behaviour and reliability. Trusted knowledge on stress amount and sign is a basic need developing new products. Electronics and MEMS devices often demand an extremely high spatial resolution of stress states. Only a few methods, like X-ray / electron diffraction [1, 2] and microRaman spectroscopy [3, 4] have been established as indirect stress measurement tools. Even finite element simulation reaches its limits to predict reliably mechanical stresses, if systems are rather complex and material laws are insufficiently known [5, 6]. Stress measurement by means of FIB based ion milling and subsequent quantification of stress relief pattern is a new approach, published first, 10 years ago [7]. In the meanwhile the method has been utilized and strengthened by several research labs [8-10]. Currently an extensive European program is realized to qualify this method for commercialization and to apply it under industrial conditions [11]. This contribution gives an overview on the measurement method, the current state-of-art on the method qualification, on measurement capabilities and limits. For example, typical research lab applications on thin layer stacks and 3D integration components like TSVs are demonstrated as well