Strains in Si-onSiO\u3csub\u3e2\u3c/sub\u3e Structures Formed By Oxygen Implantation: Raman Scattering Characterization

Low-temperature Raman scattering measurements were carried out to characterize Si-on-SiO2 structures formed by oxygen implantation and subsequent furnace or lamp annealing. The experiments were conducted with 413.1 nm laser light to probe only the thin Si layers at the top of the structures. The Raman spectra of the furnace-annealed samples are red shifted and broadened when compared with a virgin Si surface. The shifts and broadenings decrease with increasing annealing temperatures but they are still present in samples annealed above 1250°C for 3 h. No shifts or broadenings affect the Raman peaks of the layers, which were lamp annealed at 1405°C for half an hour. The red shifts indicate that the recrystallized Si layers are under tensile strains, whose origin is attributed to oxide precipitates. Quantitative estimates of the strains and associated stresses are obtained from the measured Raman shifts

MICROELECTRONICS APPLICATIONS OF DEPOSITED Si FILMS RECRYSTALLIZED FROM THE MELT

Des films cristallins de Si sur substrats isolés sont nécessaires pour des circuits intégrés de haute performance à grande échelle, pour des appareils à haut voltage, et pour des circuits de grande superficie montés sur surfaces planes. De tels films ont été obtenus en faisant fondre et recristalliser sélectivement du polycristal de Si provenant de la vaporisation sur des amas oxydés de Si et d'une grande quantité de silice fondue. Selon le précurseur et selon la technique employée pour la fonte, de grands cristaux ou de simples couches de cristaux sont obtenus. On observe la recristallisation du Si avec cw et des lasers Q-switched, avec des chauffages au graphite et avec des lampes de haute intensité. La fabrication de transistors dans des films recristallisés est revue, et l'influence de frontières de grains résiduels ainsi que les autres défauts de l'appareillage sont évalués. De plus, les applications du polysilicate ayant été exposé aux rayonnements, dans les circuits intégrés conventionnels sont décrites.Crystalline Si films on insulating substrates are needed for high-performance large scale integrated circuits, for high voltage devices, and for large area circuits used in flat-panel displays. Such films have been successfully formed by selective melting and recrystallization of polycrystalline Si deposited from the vapor on oxidized Si wafers and on bulk fused silica. Depending on the precursor structure and on the melting procedure, large crystallites or single crystalline layers are achieved. We describe Si recrystallization with cw and Q-switched lasers, with graphite heaters and with high intensity lamps. Transistor fabrication in recrystallized films is reviewed, and the influence of residual grain boundaries and other defects on device performance is evaluated. In addition, applications of beam-processed polysilicon in conventional integrated circuits are described

GRAIN BOUNDARY DIFFUSION IN POLYCRYSTALLINE SILICON FILMS ON SiO2

La différence préférentielle intergranulaire dans des couches de silicium polycristallin LPCVD recuits par laser cw sur insulateur SiO2 a été étudiée et le coefficient de diffusion intergranulaire D' pour le phosphore déterminé. Des diodes Mesa ont été fabriquées dans des couches de silicium polycristallin à gros grains par photolithographie standard, méthodes d'attaque et implantation ionique. Le mode de courant induit (EBIC) de la MEB a permis de mesurer directement les longueurs de diffusion des dopants le long des joints de grains qui coupent la jonction p-n. Nous avons trouvé une variation de la profondeur de pénétration en t¼ et que la variation du coefficient de diffusion en température suivait la loi d'Arrhénius. La formulation exacte du problème de diffusion intergranulaire donnée par Whipple nous a permis d'évaluer numériquement les données expérimentales.The enhanced grain boundary diffusion in cw laser processed LPCVD polycrystalline silicon films on insulating SiO2 has been investigated and the grain boundary diffusion coefficient D' for Phosphorus has been determined. Mesa diodes were fabricated in the large grain poly-Si films by standard photolithographic and etching methods and subsequent ion implantation. The electron beam induced current mode (EBIC) of the SEM allowed direct measurement of the dopant diffusion length along the grain boundaries intersecting the p-n junction. We have found a t¼ dependence of the penetration depth and Arrhenius behavior for the temperature dependence of the diffusion coefficient. The numerical evaluation of the experimental data is based on Whipple's exact solution of the grain boundary diffusion problem

Seeded Oscillatory Growth of Si Over SiO² by cw Laser Irradiation

Extensive seeded epitaxial growth of crystalline Si over SiO2 was achieved by an oscillatory regrowth method applied to rectangular Si pads recessed into a thick SiO2 film. Narrow (≃5 μm) via holes linked the pads with the bulk (100) Si substrate. Oriented single crystals propagated as far as 500 μm from the seeding area, following the long term advance of a scanned focused laser beam

The influence of substrate on SOI photonic crystal thermo-optic devices

We investigate the influence of the substrate on a photonic crystal thermo-optic device on a silicon-on-insulator (SOI) platform. The substrate-induced thermo-optic tuning is obtained as a function of key physical parameters, based on a semi-analytic theory that agrees well with numeric simulations. It is shown that for some devices, the substrate’s contribution to the thermo-optic tuning can exceed 10% for a heater located in the waveguide core and much higher for some other configurations. The slow response of the substrate may also significantly slow down the overall response time of the device. Strategies of minimizing the substrate’s influence are discussed

Minimizing thermal resistance and collector-to-substrate capacitance in graded base SiGe BiCMOS on SOI

We describe a low fabrication cost, high-performance implementation of SiGe BiCMOS on SOI. The use of high-energy Implant allows the simultaneous formation of the subcollector and an additional n-type region below the buried oxide. The combination of buried oxide layer and floating n-type region underneath results In a very low col lector-to-substrate capacitance. We also show that this process option achieves a much lower thermal resistance than using SOI with deep trench isolation, both reducing cost and curbing self-heating effects