Circuit arrangement for enhancing the transconductance of a differential amplifier stage comprising MOS transistors

A circuit arrangement for enhancing the transconductance of a differential amplifier stage comprising a pair of MOS transistors, having respective source electrodes connected together through a circuit node, comprises a pair of active components respectively connected in each of the connections between the aforesaid electrodes and the aforesaid node and serving a characteristic function corresponding to that of a negative value resistor. This arrangement enables the transconductance of the differential stage to be increased while keeping the dissipated electric power low and the area occupied in an integrated circuit small

Circuit arrangement for increasing the gain-bandwidth product of a CMOS amplifier

A circuit arrangement for increasing the gain-bandwidth product of a CMOS amplifier having a differential cell input stage comprises, within said input stage: a pair of active components having a characteristic function which corresponds with that of a negative value resistor, for increasing the transconductance of the stage, a pair of capacitors being each respectively associated with a corresponding one of the active components to introduce a pole/zero pair in the frequency response from the amplifier, and an additional input stage cross-connected to the differential cell for bringing the frequency value of the zero a predetermined distance away from the amplifier clipping frequency