10 research outputs found

    Food and Nutrition Security Indicators: A Review

    Full text link
    In this paper, we review existing food and nutrition security indicators, discuss some of their advantages and disadvantages, and finally classify them and describe their relationships and overlaps. In order to achieve this, the paper makes reference to the existing definitions of food and nutrition security (FNS), in particular as they have been agreed upon and implemented in the FoodSecure project (www.foodsecure.eu). The main existing conceptual frameworks of FNS predating the present paper are also used as guidelines and briefly discussed. Finally, we make recommendations in terms of the most appropriate FNS indicators to quantify the impacts of various shocks and interventions on food and nutrition security outcomes

    SMCGen: Generating reconfigurable design for sequential Monte Carlo applications

    No full text
    The Sequential Monte Carlo (SMC) method is a simulation-based approach to compute posterior distributions. SMC methods often work well on applications considered intractable by other methods due to high dimensionality, but they are computationally demanding. While SMC has been implemented efficiently on FPGAs, design productivity remains a challenge. This paper introduces a design flow for generating efficient implementation of reconfigurable SMC designs. Through templating the SMC structure, the design flow enables efficient mapping of SMC applications to multiple FPGAs. The proposed design flow consists of a parametrisable SMC computation engine, and an open-source software template which enables efficient mapping of a variety of SMC designs to reconfigurable hardware. Design parameters that are critical to the performance and to the solution quality are tuned using a machine learning algorithm based on surrogate modelling. Experimental results for three case studies show that design performance is substantially improved after parameter optimisation. The proposed design flow demonstrates its capability of producing reconfigurable implementations for a range of SMC applications that have significant improvement in speed and in energy efficiency over optimised CPU and GPU implementations
    corecore