Development of a nanogap fabrication method for applications in nanoelectromechanical systems and nanoelectronics

There is a great need for a well-controlled nanogap fabrication technique compatible with NEMS applications. Theoretically, a displacement sensor based on vacuum tunnel junction or a nanogap can be capable of performing quantum-limited measurements in NEMS applications. Additionally, in the context of nanoelectronics, nanogaps are widely demanded to characterize nanostructures and to incorporate them into nanoscale electronic devices. Here, we have proposed and implemented a fabrication technique based on the controlled shrinkage of a lithographically defined gap between two suspended structures by thermal evaporation. We have consistently produced rigid and stable metallic vacuum tunneling junctions at nanometer or subnanometer sizes. The fabricated nanogaps were characterized by I-V measurements and their gap sizes and potential barrier heights were interrogated using the Simmons' model. Throughout this work, high tensile stress silicon nitride thin films were preferred for the fabrication of suspended structures because they have high resonance frequencies with low dissipation, they are mechanically stable, and they are resilient to stiction problem. However, high-stress nitride structures experience a complex shape deformation once they are suspended. The shape deformation is undesired when the precise positioning of the structures is required as in nanogap fabrication. We developed a new method in which the built in stress gradient is utilized to tune the distance between two suspended structures. The technique was simulated by finite element analysis and experimentally implemented to demonstrate a gap tuning capability beyond the lithographic resolution limits

Growth of thin graphene layers on stacked SiC surface in ultra high vacuum

We demonstrate a technique to produce thin graphene layers on C-face of SiC under ultra high vacuum conditions. A stack of two SiC substrates comprising a half open cavity at the interface is used to partially confine the depleted Si atoms from the sample surface during the growth. We observe that this configuration significantly slows the graphene growth to easily controllable rates on C-face SiC in UHV environment. Results of low-energy electron diffractometry and Raman spectroscopy measurements on the samples grown with stacking configuration are compared to those of the samples grown by using bare UHV sublimation process

Tuning of nanogap size in high tensile stress silicon nitride thin films

High tensile stress suspended structures are demanded for high mechanical quality factor applications. However, high tensile stress causes distortion of the original shapes by contracting, buckling, and bending the suspended structures. We demonstrate a method to compensate for the shape deformation of suspended structures due to intrinsic tensile stress after they are released. With a new design, the distance between two suspended structures after wet etch can easily be tuned by a single fabrication beyond the lithographic resolution limits. The technique is simulated by finite element analysis and experimentally implemented to demonstrate a gap tuning capability with 2.4 nm standard error

Control of the graphene growth rate on capped SiC surface under strong Si confinement

The effect of the degree of Si confinement on the thickness and morphology of UHV grown epitaxial graphene on (0 0 0 −1) SiC is investigated by using atomic force microscopy and Raman spectroscopy measurements. Prior to the graphene growth process, the C-face surface of a SiC substrate is capped by another SiC comprising three cavities on its Si-rich surface with depths varying from 0.5 to 2 microns. The Si atoms, thermally decomposed from the sample surface during high temperature annealing of the SiCcap/SiCsample stack, are separately trapped inside these individual cavities at the sample/cap interface. Our analyses show that the growth rate linearly increases with the cavity height. It was also found that stronger Si confinement yields more uniform graphene layers