3,503 research outputs found

    Exploitation of Digital Filters to Advance the Single-Phase T/4 Delay PLL System

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    With the development of digital signal processing technologies, control and monitoring of power electronics conversion systems have been evolving to become fully digital. As the basic element in the design and analysis phases of digital controllers or filters, a number of unit delays (z-1) have been employed, e.g., in a cascaded structure. Practically, the number of unit delays is designed as an integer, which is related to the sampling frequency as well as the ac signal fundamental frequency (e.g., 50 Hz). More common, the sampling frequency is fixed during operation for simplicity and design. Hence, any disturbance in the ac signal will violate this design rule and it can become a major challenge for digital controllers. To deal with the above issue, this paper first exploits a virtual unit delay (zv-1) to emulate the variable sampling behavior in practical digital signal processors with a fixed sampling rate. This exploitation is demonstrated on a T/4 Delay Phase Locked Loop (PLL) system for a single-phase grid-connected inverter. The T/4 Delay PLL requires to cascade 50 unit delays when implemented (for a 50-Hz system with 10 kHz sampling frequency). Furthermore, digital frequency adaptive comb filters are adopted to enhance the performance of the T/4 Delay PLL when the grid suffers from harmonics. Experimental results have confirmed the effectiveness of the digital filters for advanced control systems

    Overview of Single-Phase Grid-Connected Photovoltaic Systems

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    Analysis of Middle Frequency Resonance in DFIG System Considering Phase Locked Loop

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    Wide Frequency Band Active Damping Strategy for DFIG System High Frequency Resonance

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    Reliability Evaluation of Power Capacitors in a Wind Turbine System

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    Supervised imitation learning of FS-MPC algorithm for multilevel converters

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    Power Electronics Control of Wind Energy in Distributed Power Systems

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    Improved DFIG Capability during Asymmetrical Grid Faults

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    Power Talk in DC Micro Grids: Constellation Design and Error Probability Performance

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    Power talk is a novel concept for communication among units in a Micro Grid (MG), where information is sent by using power electronics as modems and the common bus of the MG as a communication medium. The technique is implemented by modifying the droop control parameters from the primary control level. In this paper, we consider power talk in a DC MG and introduce a channel model based on Thevenin equivalent. The result is a channel whose state that can be estimated by both the transmitter and the receiver. Using this model, we present design of symbol constellations of arbitrary order and analyze the error probability performance. Finally, we also show how to design adaptive modulation in the proposed communication framework, which leads to significant performance benefits.Comment: IEEE SmartGridComm 201
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