Sizing of Analog Cells by Means of a Tabu Search Approach

Although many design tools have been developed for digital design, analog design tools are only just being introduced. This paper presents a new optimization method for automatically sizing the circuit topology of analog cells. This method minimizes a cost function, which depends on a set of designer specifications. It employs the tabu search heuristic to avoid being trapped in a local minimum of the cost function. Experimental results show that this method can get very close to the global minimum of the cost function with a small number of iterations. Hence, an analog simulation program, such as SPICE, can be used for the evaluation of the cost function at each iteration. I. INTRODUCTION There is an increasing trend towards the integration of analog blocks in ASIC circuits. Despite the great effort that has been made in the development of CAD tools for analog and mixed circuits, the design of the analog part of a chip continues to be a bottleneck [1]--[2]. Different optimization tec..