Effect of grain alignment on interface trap density of thermally oxidized aligned-crystalline silicon films

The authors report studies of the effect of grain alignment on interface trap density of thermally oxidized aligned-crystalline silicon (ACSi) films by means of capacitance-voltage (C-V) measurements. C-V curves were measured on metal-oxide-semiconductor (MOS) capacitors fabricated on 〈001〉- oriented ACSi films on polycrystalline substrates. From high-frequency C-V curves, the authors calculated a decrease of interface trap density from 2× 1012 to 1× 1011 cm-2 eV-1 as the grain mosaic spread in ACSi films improved from 13.7° to 6.5°. These results demonstrate the effectiveness of grain alignment as a process technique to achieve significantly enhanced performance in small-grained (≤1 μm) polycrystalline Si MOS-type devices. © 2006 American Institute of Physics

Dependence of carrier mobility on grain mosaic spread in 〈001〉-oriented Si films grown on polycrystalline substrates

We studied the dependence of carrier mobility on grain mosaic spread for 〈001〉-oriented, 200-to- 400-nm -thick Si thin films grown on polycrystalline metal substrates. The Hall mobility increased from 1% to 23% of that in bulk single-crystal Si with decreasing grain mosaic spread from 14° to 2°. For the same range of parameters, a model combining intragrain and grain boundary scattering yielded a decrease of the energy barrier height from 0.1 eV to less than 10-3 eV and an accompanying decrease of trap density from 6× 1011 cm-2 to less than 3× 1010 cm-2. These results demonstrate that, for polycrystalline Si films, improving the intergrain alignment is an effective and practical alternative to increasing the grain size to achieve enhanced mobility. © 2005 American Institute of Physics