20 research outputs found

    Defect Characterization in SiGe/SOI Epitaxial Semiconductors by Positron Annihilation

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    The potential of positron annihilation spectroscopy (PAS) for defect characterization at the atomic scale in semiconductors has been demonstrated in thin multilayer structures of SiGe (50 nm) grown on UTB (ultra-thin body) SOI (silicon-on-insulator). A slow positron beam was used to probe the defect profile. The SiO2/Si interface in the UTB-SOI was well characterized, and a good estimation of its depth has been obtained. The chemical analysis indicates that the interface does not contain defects, but only strongly localized charged centers. In order to promote the relaxation, the samples have been submitted to a post-growth annealing treatment in vacuum. After this treatment, it was possible to observe the modifications of the defect structure of the relaxed film. Chemical analysis of the SiGe layers suggests a prevalent trapping site surrounded by germanium atoms, presumably Si vacancies associated with misfit dislocations and threading dislocations in the SiGe films

    Ge quantum dot arrays grown by ultrahigh vacuum molecular beam epitaxy on the Si(001) surface: nucleation, morphology and CMOS compatibility

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    Issues of morphology, nucleation and growth of Ge cluster arrays deposited by ultrahigh vacuum molecular beam epitaxy on the Si(001) surface are considered. Difference in nucleation of quantum dots during Ge deposition at low (<600 deg C) and high (>600 deg. C) temperatures is studied by high resolution scanning tunneling microscopy. The atomic models of growth of both species of Ge huts---pyramids and wedges---are proposed. The growth cycle of Ge QD arrays at low temperatures is explored. A problem of lowering of the array formation temperature is discussed with the focus on CMOS compatibility of the entire process; a special attention is paid upon approaches to reduction of treatment temperature during the Si(001) surface pre-growth cleaning, which is at once a key and the highest-temperature phase of the Ge/Si(001) quantum dot dense array formation process. The temperature of the Si clean surface preparation, the final high-temperature step of which is, as a rule, carried out directly in the MBE chamber just before the structure deposition, determines the compatibility of formation process of Ge-QD-array based devices with the CMOS manufacturing cycle. Silicon surface hydrogenation at the final stage of its wet chemical etching during the preliminary cleaning is proposed as a possible way of efficient reduction of the Si wafer pre-growth annealing temperature.Comment: 30 pages, 11 figure

    Fabrication of Coaxial Si1−xGex Heterostructure Nanowires by O2 Flow-Induced Bifurcate Reactions

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    We report on bifurcate reactions on the surface of well-aligned Si1−xGex nanowires that enable fabrication of two different coaxial heterostructure nanowires. The Si1−xGex nanowires were grown in a chemical vapor transport process using SiCl4 gas and Ge powder as a source. After the growth of nanowires, SiCl4 flow was terminated while O2 gas flow was introduced under vacuum. On the surface of nanowires was deposited Ge by the vapor from the Ge powder or oxidized into SiO2 by the O2 gas. The transition from deposition to oxidation occurred abruptly at 2 torr of O2 pressure without any intermediate region and enables selectively fabricated Ge/Si1−xGex or SiO2/Si1−xGex coaxial heterostructure nanowires. The rate of deposition and oxidation was dominated by interfacial reaction and diffusion of oxygen through the oxide layer, respectively

    Microstructures of Superconducting YBa2Cu3O7−x Thin Films

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    Schottky barrier, electronic states and microstructure at Ni silicide-silicon interfaces

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    Barrier height and interface states have been measured and correlated to the microstructure of the Ni silicide-Si interfaces, including the type A and type B NiSi2 and a type C NiSi. All these interfaces can be formed with near perfect structures to yield a barrier height of 0.78 eV. Less perfect interfaces formed under less than ideal conditions or with impurity incorporation deteriorate the barrier height to 0.66 eV. The density and distribution of the interface states correlate well with the structural perfection. These results suggest that the barrier height is determined primarily by the structural perfection of the interface instead of the specific type of epitaxy. © 1986.link_to_subscribed_fulltex
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