New method for determination of harmonic distortion in SOI FD transistors

We present a new method for calculating the total harmonic distortion (THID) and the third harmonic distortion (HD3) of the output current-voltage characteristics of a semiconductor device. The method is based on the calculation of two functions which we call D and D3 and are based on a specific integration of the DC current-voltage characteristic of the device. In this paper we demonstrate that function D can be correlated with the THD and function D3 with the HD3, so that they can be determined in a much simpler way, with no need to use derivatives, Fourier coefficients or fast Fourier transforms. The new method is applied to calculate the harmonic distortion of a silicon-on-insulator (Sol) fully depleted (FD) MOS transistor in the triode regime to be used as an active resistor at the input of an operational amplifier in a MOSFET-C filter configuration. It is also demonstrated that the transistor I-DS-V-DS characteristics used in these calculations can be obtained from either measurements, analytical models or numerical simulations. (C) 2002 Elsevier Science Ltd. All rights reserved

A method to extract mobility degradation and total series resistance of fully-depleted SOI MOSFETs

Free-carrier mobility degradation in the channel and drain/source series resistance are two important parameters limiting the performance of MOS devices. In this paper, we present a method to extract these parameters from the drain current versus gate voltage characteristics of fully-depleted (FD) SOI MOSFETs operating in the saturation region. This method is developed based on an integration function which reduces errors associated with the extraction procedure and on the d.c. characteristics of MOS devices having several different channel lengths. Simulation results and measured data of FD SOI MOSFETs are used to test and verify the method developed