Structural Comparison of Human Mammalian Ste20-Like Kinases

BACKGROUND: The serine/threonine mammalian Ste-20 like kinases (MSTs) are key regulators of apoptosis, cellular proliferation as well as polarization. Deregulation of MSTs has been associated with disease progression in prostate and colorectal cancer. The four human MSTs are regulated differently by C-terminal regions flanking the catalytic domains. PRINCIPAL FINDINGS: We have determined the crystal structure of kinase domain of MST4 in complex with an ATP-mimetic inhibitor. This is the first structure of an inactive conformation of a member of the MST kinase family. Comparison with active structures of MST3 and MST1 revealed a dimeric association of MST4 suggesting an activation loop exchanged mechanism of MST4 auto-activation. Together with a homology model of MST2 we provide a comparative analysis of the kinase domains for all four members of the human MST family. SIGNIFICANCE: The comparative analysis identified new structural features in the MST ATP binding pocket and has also defined the mechanism for autophosphorylation. Both structural features may be further explored for inhibitors design. ENHANCED VERSION: This article can also be viewed as an enhanced version in which the text of the article is integrated with interactive 3D representations and animated transitions. Please note that a web plugin is required to access this enhanced functionality. Instructions for the installation and use of the web plugin are available in Text S1

Reverse Engineering Tools for Converting PVM-C Applications into PVMGraph Format

This report describes the implementation of the Reverse Engineering tools C2graph and Split

EDPEPPS: a toolset for the design and performance evaluation of parallel applications

This paper describes a performance-oriented environment for the design of portable parallel software. The environment consists of a graphical design tool based on the PVM communication library for building parallel algorithms, a state-of-the-art simulation engine, a CPU characteriser and a visualisation tool for animation of program execution and visualisation of platform and network performance measures and statistics. The toolset is used to model a virtual machine composed of a cluster of workstations interconnected by a local area network. The simulation model used is modular and its components are interchangeable which allows easy re-configuration of the platform. Both communication and CPU models are validated

EDPEPPS: An Environment for the Design and Performance Evaluation of Portable Parallel Software

This paper describes an environment for performance-oriented design of portable parallel software. The environment consists of a graphical design tool based on the PVM communication library for building parallel algorithms, a state-of-the-art simulation engine, a CPU characteriser and a visualisation tool for animation of program execution and visualisation of platform and network performance measures and statistics. The toolset is used to model a virtual machine composed of a cluster of workstations interconnected by a local area network. The simulation model used is modular and its components are interchangeable which allows easy re-configuration of the platform. Both communication and CPU models are validated

EDPEPPS: An Environment for the Design and Performance Evaluation of Portable Parallel Software

. This paper describes an environment for performance-oriented design of portable parallel software. The environment consists of a graphical design tool based on the PVM communication library for building parallel algorithms, a state-of-the-art simulation engine and a visualisation tool for animation of program execution and visualisation of platform and network performance measures and statistics. The toolset is used to model a virtual machine composed of a cluster of workstations interconnected by a local area network. The simulation model used is modular and its components are interchangeable which allows easy re-configuration of the platform. The model is validated using experiments on the COMMS1 benchmark from the Parkbench suite, and a standard image processing algorithm with maximum errors of 1% and 10% respectively. 1 Introduction A major obstacle to the widespread adoption of parallel computing in industry is the difficulty in program development due mainly to lack of parall..