167 research outputs found

    Opportunities and perspectives for green chemistry in semiconductor technologies

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    © 2019 The Royal Society of Chemistry. Semiconductor chip manufacturing has one of the highest environmental footprints within the electronics life cycle. This sector offers a plethora of technological challenges and opportunities for implementing green chemistry principles more extensively. In addition to technical solutions, a renewed collaborative focus on green chemistry throughout the ecosystem of the semiconductor industry, particularly in the pre-competitive stage, will be fundamental to seeing those solutions through to implementation

    Controlling the intrinsic bending of hetero-epitaxial silicon carbide micro-cantilevers

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    � 2015 AIP Publishing LLC. We introduce a simple methodology to predict and tailor the intrinsic bending of a cantilever made of a single thin film of hetero-epitaxial silicon carbide grown on silicon. The combination of our novel method for the depth profiling of residual stress with a few nm resolution with finite element modelling allows for the prediction of the bending behaviour with great accuracy. We also demonstrate experimentally that a silicon carbide cantilever made of one distinct film type can be engineered to obtain the desired degree of either upward, flat, or downward bending, by selecting the appropriate thickness and cantilever geometry. A precise control of cantilever bending is crucial for microelectrical mechanical system applications such as micro-actuators, micro-switches, and resonant sensors

    Electrical challenges of heteroepitaxial 3C-SiC on silicon

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    © 2018 Trans Tech Publications, Switzerland. We have investigated the electrical conduction in epitaxial cubic silicon carbide films on low-doped and high-resistive silicon substrates. The electrical properties of the film/substrate system such as the carrier concentration, carrier mobility, and sheet resistance were evaluated by performing Hall measurements in a van der Pauw configuration at room temperature. For the SiC on low-doped p-Si, we found that the charge carriers in the substrate always dominate the electrical conduction indicating an electrical shorting of the film to the substrate and the absence of a p/n junction. Meanwhile, for the SiC films grown on high-resistive silicon, we found an evidence of current leakage through a silicon region right below the SiC/Si interface, generated upon SiC growth. Leakage resistances in the kΩ range obtained from TLM structures made of isolated SiC pillars on high-resistive silicon confirmed the presence of a conductive region below the SiC/Si interface. This work also shows that this electrical leakage can be supressed using a high-resistive silicon as the substrate and etching away the conductive region below the interface

    Preface

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    Orientation-dependent stress relaxation in hetero-epitaxial 3C-SiC films

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    Residual stresses in epitaxial 3C-SiC films on silicon, for chosen growth conditions, appear determined by their growth orientation. Stress evaluation locally with Raman spectroscopy, and across a 150 mm wafer with curvature measurements, indicate that thin films can be grown on Si(100) with residual tensile stresses as low as 150 MPa. However, films on Si(111) retain a considerably higher stress, around 900 MPa, with only minor decrease versus film thickness. Stacking faults are indeed geometrically a less efficient relief mechanism for the biaxial strain of SiC films grown on Si(111) with 〈111〉 orientation. Residual stresses can be tuned by the epitaxial process temperatures. © 2013 American Institute of Physics

    Graphene-Based Planar Microsupercapacitors: Recent Advances and Future Challenges

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    © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim The continuous development of integrated electronics such as maintenance-free biosensors, remote and mobile environmental sensors, wearable personal electronics, nanorobotics etc. and their continued miniaturization has led to an increasing demand for miniaturized energy storage units. Microsupercapacitors with graphene electrodes hold great promise as miniaturized, integrated power sources thanks to their fast charge/discharge rates, superior power performance, and long cycling stability. In addition, planar interdigitated electrodes also have the capability to reduce ion diffusion distances leading to a greatly improved electrochemical performance. Either as standalone power sources or complementing energy harvesting units, it is expected that graphene-based microsupercapacitors will play a key role as miniaturized power sources in electronic microsystems. This review highlights the recent development, challenges, and perspectives in this area, with an emphasis on the link between material and geometry design of planar graphene-based electrodes and their electrochemical performance and integrability

    All-solid-state supercapacitors on silicon using graphene from silicon carbide

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    © 2016 Author(s). Carbon-based supercapacitors are lightweight devices with high energy storage performance, allowing for faster charge-discharge rates than batteries. Here, we present an example of all-solid-state supercapacitors on silicon for on-chip applications, paving the way towards energy supply systems embedded in miniaturized electronics with fast access and high safety of operation. We present a nickel-assisted graphitization method from epitaxial silicon carbide on a silicon substrate to demonstrate graphene as a binder-free electrode material for all-solid-state supercapacitors. We obtain graphene electrodes with a strongly enhanced surface area, assisted by the irregular intrusion of nickel into the carbide layer, delivering a typical double-layer capacitance behavior with a specific area capacitance of up to 174 μF cm-2 with about 88% capacitance retention over 10 000 cycles. The fabrication technique illustrated in this work provides a strategic approach to fabricate micro-scale energy storage devices compatible with silicon electronics and offering ultimate miniaturization capabilities

    Ashing of photoresists using dielectric barrier discharge cryoplasmas

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    Plasma ashing of photoresists is a critical step in advanced microelectronics manufacturing as it often leads to extensive damage in porous organosilicate low - κ dielectrics and hinders the use of highly porous films in interconnects. To reduce plasma damage, the authors investigated the feasibility of ashing a 248-nm photoresist with cryoplasma. The authors ashed photoresist-coated silicon wafers with dielectric barrier discharge microplasma generated at temperatures of 170-291 K, a pressure of 100 Torr, applied voltages of V appl = 0.8 - 1.6 kV, and a frequency of f = 20 kHz in both Ar / O 2 and Ar / O2/ N 2 gas mixtures. While the ashing rates at 170 K in Ar / O2 decreased to about 20% of the ashing rates achieved at room temperature and 240 K, the addition of N 2 to the plasma gas enhanced the ashing rates by a factor of 1.5-2. Optical emission spectroscopy measurements of the plasmas showed that, in the Ar / O2 / N 2 mixture, the main reactive species are N 2 radicals; x-ray photoelectron spectra of the ashed photoresists indicated that ashing is initiated from oxygen-containing functional groups of the photoresist. This study showed that decreased ashing rates at low plasma gas temperatures can be significantly enhanced by adjusting the plasma chemistry and that cryoplasma offers a viable process to minimize the damage from ashing of low - κ dielectric materials in interconnects, which will allow nanoelectronic devices to fully benefit from the introduction of such porous materials. © 2013 American Vacuum Society

    Factors affecting the f× Q product of 3C-SiC microstrings: What is the upper limit for sensitivity?

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    © 2016 AIP Publishing LLC. The fn×Q (Hz) is a crucial sensitivity parameter for micro-electro-mechanical sensing. We have recently shown a fn×Q product of ∼1012Hz for microstrings made of cubic silicon carbide on silicon, establishing a new state-of-the-art and opening new frontiers for mass sensing applications. In this work, we analyse the main parameters influencing the frequency and quality factor of silicon carbide microstrings (material properties, microstring geometry, clamping condition, and environmental pressure) and investigate the potential for approaching the theoretical upper limit. We indicate that our previous result is only about a factor 2 lower than the thermoelastic dissipation limit. For fully reaching this upper limit, a substantial reduction of the defects in the silicon carbide thin film would be required, while maintaining a high residual tensile stress in the perfect-clamped strings
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