A novel single-chip RF-voltage-controlled oscillator for bio-sensing applications

A novel interdigiated capacitance (IDC) based affinity biosensor system is presented that detects C-Reactive Protein (CRP), a risk marker for cardiovascular diseases, and transmit the information to a distance location wirelessly. The biosensor system consist of a voltage controlled oscillator (VCO) and an IDC. In the presence of CRP the capacitance of the IDC changes and this directly reflects to the oscillation frequency of the VCO. In the presence of 800 ng/ml antigen the frequency of the system shifts from 1.9438 GHz to 1.94175 GHz and with 64 ug/ml frequency shifts from 1.95975 GHz to 1.94875 GHz with -120 dBc/Hz phase noise

Realization of a ROIC for 72x4 PV-IR detectors

Silicon Readout Integrated Circuits (ROIC) for HgCdTe Focal Plane Arrays of 1x4 and 72x4 photovoltaic detectors are represented. The analog circuit blocks are completely identical for both, while the digital control circuit is modified to take into account the larger array size. The manufacturing technology is 0.35μm, double poly-Si, three-metal CMOS process. ROIC structure includes four elements TDI functioning with a super sampling rate of 3, bidirectional scanning, dead pixel de-selection, automatic gain adjustment in response to pixel deselection besides programmable four gain setting (up to 2.58pC storage), and programmable integration time. ROIC has four outputs with a dynamic range of 2.8V (from 1.2V to 4V) for an output load of 10pF capacitive in parallel with 1MΩ resistance, and operates at a clock frequency of 5 MHz. The input referred noise is less than 1037 μV with 460 fF integration capacitor, corresponding to 2978 electrons

Design of a tunable multi-band differential LC VCO using 0.35 mu m SiGe BiCMOS technology for multi-standard wireless communication systems

In this paper, an integrated 2.2-5.7GHz multi-band differential LC VCO for multi-standard wireless communication systems was designed utilizing 0.35 mu m SiGe BiCMOS technology. The topology, which combines the switching inductors and capacitors together in the same circuit, is a novel approach for wideband VCOs. Based on the post-layout simulation results, the VCO can be tuned using a DC voltage of 0 to 3.3 V for 5 different frequency bands (2.27-2.51 GHz, 2.48-2.78 GHz, 3.22-3.53 GHz, 3.48-3.91 GHz and 4.528-5.7 GHz) with a maximum bandwidth of 1.36 GHz and a minimum bandwidth of 300 MHz. The designed and simulated VCO can generate a differential output power between 0.992 and -6.087 dBm with an average power consumption of 44.21 mW including the buffers. The average second and third harmonics level were obtained as -37.21 and -47.6 dBm, respectively. The phase noise between -110.45 and -122.5 dBc/Hz, that was simulated at 1 MHz offset, can be obtained through the frequency of interest. Additionally, the figure of merit (FOM), that includes all important parameters such as the phase noise, the power consumption and the ratio of the operating frequency to the offset frequency, is between -176.48 and -181.16 and comparable or better than the ones with the other current VCOs. The main advantage of this study in comparison with the other VCOs, is covering 5 frequency bands starting from 2.27 up to 5.76 GHz without FOM and area abandonment. Output power of the fundamental frequency changes between -6.087 and 0.992 dBm, depending on the bias conditions (operating bands). Based on the post-layout simulation results, the core VCO circuit draws a current between 2.4-6.3 mA and between 11.4 and 15.3 mA with the buffer circuit from 3.3 V supply. The circuit occupies an area of 1.477 mm(2) on Si substrate, including DC, digital and RF pads

Bluetooth uygulamaları için, Tip II-, dördüncü derece-, NKesirli- frekans sentezleyici=

A fully integrated -except reference crystal-, type II fourth order fractional-N frequency synthesizer using 0.35,um CMOS technology is presented. The synthesized frequency is 2.4 GHz and the system is designed to be used in Bluetooth applications. The main achievements of the system are fully monolithic integration except the crystal reference oscillator, small die area (0.5 mm2) without on-chip inductors, fast settling time of 80pts, 80 mW power consumption, rail-to-rail output swing and single supply voltage for mobile applications

Design of a Tunable Multi-Band Differential LC VCO Using 0.35<mu>m SiGe BiCMOS Technology for Multi-standard Wireless Communication Systems

In this paper, a 2.2-5.7 GHz Multi-band Differential LC Voltage controlled oscillator (VCO) for Multi-band Multi-standard is presented. The advantages of this VCO topology are 1) 5 controllable frequency bands, which is utilized by multi- standard, by the help of switching inductor and capacitor method 2) provide low phase noise performance by using all PMOS current sources topology which has minimum intrinsic and extrinsic sources of noise. The circuit is designed with AMS 0.35μm SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar Transistors (HBTs). According to the post layout simulation results, phase noise is -110.45dBc/Hz at 1MHz offset from 5.64 GHz carrier frequency, -119dBc/Hz at 1MHz from 3.95GHz carrier frequency, -121dBc/Hz at 1MHz from 3.5GHz carrier frequency, -121.2dBc/Hz at 1MHz from 2.7GHz carrier frequency and -122.5dBc/Hz at 1MHz from 2.27GHz carrier frequency. A linear, 1300 MHz maximum tuning range and 300 MHz minimum tuning range is obtained according to the post-layout simulations, by utilizing accumulation mode varactors. Output power of the fundamental frequency changes between -6.087 dBm and 0.992 dBm depending on the bias conditions (operating bands). Based on the simulation results, the core VCO circuit draws between 2.4mA-6.3mA current according to the frequency bands and 11.4mA-15.3mA from 3.3 V supply including buffer circuits leading to a total power dissipation of 34.2-50.5mW. Including DC, Digital and RF pads circuit layout occupies an area of 1.477mm2 on Si substrate