A novel single-chip RF-voltage-controlled oscillator for bio-sensing applications

A novel interdigiated capacitance (IDC) based affinity biosensor system is presented that detects C-Reactive Protein (CRP), a risk marker for cardiovascular diseases, and transmit the information to a distance location wirelessly. The biosensor system consist of a voltage controlled oscillator (VCO) and an IDC. In the presence of CRP the capacitance of the IDC changes and this directly reflects to the oscillation frequency of the VCO. In the presence of 800 ng/ml antigen the frequency of the system shifts from 1.9438 GHz to 1.94175 GHz and with 64 ug/ml frequency shifts from 1.95975 GHz to 1.94875 GHz with -120 dBc/Hz phase noise

A fully integrated multiband frequency synthesizer for WLAN and WiMAX applications

This paper presents a fractional N frequency synthesizer which covers WLAN and WiMAX frequencies on a single chip. The synthesizer is fully integrated in 0.35μm BiCMOS AMS technology except crystal oscillator. The synthesizer operates at four frequency bands (3.101-3.352GHz, 3.379-3.727GHz, 3.7-4.2GHz, 4.5-5.321GHz) to provide the specifications of 802.16 and 802.11 a/b/g/y. A single on-chip LC - Gm based VCO is implemented as the core of this synthesizer. Different frequency bands are selected via capacitance switching and fine tuning is done using varactor for each of these bands. A bandgap reference circuit is implemented inside of this charge pump block to generate temperature and power supply independent reference currents. Simulated settling time is around 10μsec. Total power consumption is measured to be 118.6mW without pad driving output buffers from a 3.3V supply. The phase noise of the oscillator is lower than -116.4dbc/Hz for all bands. The circuit occupies 2.784 mm2 on Si substrate, including DC, Digital and RF pads

Design of a tunable multi-band differential LC VCO using 0.35 mu m SiGe BiCMOS technology for multi-standard wireless communication systems

In this paper, an integrated 2.2-5.7GHz multi-band differential LC VCO for multi-standard wireless communication systems was designed utilizing 0.35 mu m SiGe BiCMOS technology. The topology, which combines the switching inductors and capacitors together in the same circuit, is a novel approach for wideband VCOs. Based on the post-layout simulation results, the VCO can be tuned using a DC voltage of 0 to 3.3 V for 5 different frequency bands (2.27-2.51 GHz, 2.48-2.78 GHz, 3.22-3.53 GHz, 3.48-3.91 GHz and 4.528-5.7 GHz) with a maximum bandwidth of 1.36 GHz and a minimum bandwidth of 300 MHz. The designed and simulated VCO can generate a differential output power between 0.992 and -6.087 dBm with an average power consumption of 44.21 mW including the buffers. The average second and third harmonics level were obtained as -37.21 and -47.6 dBm, respectively. The phase noise between -110.45 and -122.5 dBc/Hz, that was simulated at 1 MHz offset, can be obtained through the frequency of interest. Additionally, the figure of merit (FOM), that includes all important parameters such as the phase noise, the power consumption and the ratio of the operating frequency to the offset frequency, is between -176.48 and -181.16 and comparable or better than the ones with the other current VCOs. The main advantage of this study in comparison with the other VCOs, is covering 5 frequency bands starting from 2.27 up to 5.76 GHz without FOM and area abandonment. Output power of the fundamental frequency changes between -6.087 and 0.992 dBm, depending on the bias conditions (operating bands). Based on the post-layout simulation results, the core VCO circuit draws a current between 2.4-6.3 mA and between 11.4 and 15.3 mA with the buffer circuit from 3.3 V supply. The circuit occupies an area of 1.477 mm(2) on Si substrate, including DC, digital and RF pads

Efficacy of the greater occipital nerve block in recurrent migraine type headaches

Aims We aimed to evaluate six months of results following repeated GON blocks. Methods We evaluated the results from GON block performed on 60 patients. Briefly, we applied a standard 2mL of 0.5% Bupivacaine GON blockage once a week for 4 weeks. We recorded the Visual Analog Scale (VAS) scores, the number of migraine attacks and the Migraine Disability Assessment Questionnaire (MIDAS) scores. The study subjects were not allowed to use medication for prophylaxis, and Ibuprofen (400mg, 1200mg at maximum) was prescribed for any migraine attacks. Results The initial mean number of attacks per month before starting treatment was 8.33+2.31. After treatment, the initial MIDAS mean was found to be 2.82 per month; this declined to 1.47 in 3rd, and was 1.50 in the 6th month. The individual month values were found to be significant, and were listed respectively as, 1st month: 3.95+2.52, 2nd month: 3.23+1.82, 3rd month: 2.60+1.90, 4th month: 2.68+2.10, 5th month: 2.58+1.90 and 6th month: 2.58+1.90. The mean VAS scores were recorded as follows for each month: 6.28±1.24, 3.13±0.97, 2.55±1.19, 2.35±1.26, 2.38±1.20 and 2.48±1.30, respectively. This difference was noted to be statistically significant. No difference regarding the efficacy of the treatment was determined when the results were compared across age groups. Conclusion We assume that GON blockage with 2mL of 0.5% Bupivacaine can be a supportive treatment in migraine treatment, with no serious adverse effects reported

A new lab-on-chip transmitter for the detection of proteins using RNA aptamers

A new RNA aptamer based affinity biosensor for CReactive Protein (CRP), a risk marker for cardiovascular disease was developed using interdigitated capacitor (IDC), integrated in Voltage Controlled Oscillator (VCO) and output signal is amplified using Single Stage Power Amplifier (PA) for transmitting signal to receiver at Industrial, Scientific and Medical (ISM) band. The Lab-on-Chip transmitter design includes IDC, VCO and PA. The design was implemented in IHP 0.25μm SiGe BiCMOS process; post-CMOS process was utilized to increase the sensitivity of biosensor. The CRP was incubated between or on interdigitated electrodes and the changes in capacitance of IDC occurred. In blank measurements, the oscillation frequency was 2.464GHz whereas after RNA aptamers were immobilized on open aluminum areas of IDC and followed by binding reaction processed with 500pg/ml CRP solution, the capacitance shifted to 2.428GHz. Phase noise is changed from -114.3dBc/Hz to -116.5dBc/Hz

A 6-bit vector-sum phase shifter with a decoder based control circuit for x-band phased-arrays

This letter presents a 6-bit vector-sum phase shifter with a novel control circuitry for X-band phased-arrays using a 0.25-m SiGe BiCMOS technology. A balanced active balun and highly accurate I/Q network are employed to generate the reference in-phase and quadrature vectors. The desired phase is synthesized by modulating and summing the generated reference vectors using current steering VGAs that are controlled by a decoder based control circuit. The phase shifter resulted in a measured RMS phase error <2.8 between 9.6-11.7 GHz and <5.6 between 8.2-12 GHz, achieving 6-bit phase resolution. The chip size is 1.870.88 mm2, excluding pads. To the best of authors’ knowledge, this is the first demonstration of a digitally controlled 6-bit vector-sum phase shifter for X-band

An x-band 6-bit active phase shifter

This paper presents a 6-bit active phase shifter using a new vector-sum method for X-band (8-12 GHz) phased arrays in 0.13 mu m SiGe BiCMOS process. An RC filter is used to generate two orthogonal vectors which are then fed into four VGAs, two using the common-base and two using the common-emitter topology. This generates 4 vectors of 0 degrees, 90 degrees, 180 degrees and 270 degrees which are scaled and added by varying the gains of the VGAs to generate any phase between 0-360 degrees. The gains of the VGAs are adjusted with analog voltage control using the current-steering method. The outputs of the VGAs are connected together with a common load in order to add the vectors in current-domain. The phase shifter achieves < 5.6 degrees RMS phase error over 8-12 GHz and < 3.1 degrees RMS phase error over 9-11 GHz. The phase shifter has a power consumption of 16.6 mW from a 2V supply. The chip size is 850 mu m x 532 mu m including the probing pads. These performance parameters are comparable with the state of the art of the technology in literature

Automated Nanofiber Diameter Measurement in SEM Images Using a Robust Image Analysis Method

Due to the high surface area, porosity, and rigidity, applications of nanofibers and nanosurfaces have developed in recent years. Nanofibers and nanosurfaces are typically produced by electrospinning method. In the production process, determination of average fiber diameter is crucial for quality assessment. Average fiber diameter is determined by manually measuring the diameters of randomly selected fibers on scanning electron microscopy (SEM) images. However, as the number of the images increases, manual fiber diameter determination becomes a tedious and time consuming task as well as being sensitive to human errors. Therefore, an automated fiber diameter measurement system is desired. In the literature, this task is achieved by using image analysis algorithms. Typically, these methods first isolate each fiber in the image and measure the diameter of each isolated fiber. Fiber isolation is an error-prone process. In this study, automated calculation of nanofiber diameter is achieved without fiber isolation using image processing and analysis algorithms. Performance of the proposed method was tested on real data. The effectiveness of the proposed method is shown by comparing automatically and manually measured nanofiber diameter values

Figure 1: Simple block diagram of a SiGe BiCMOS On chip T/R module 4-Bit SiGe Phase Shifter using Distributed Active Switches and Variable Gain Amplifier For X-Band Phased Array Applications

Abstract-This paper presents a 4-bit digitally controlled phase shifter for X-band (8-12.5 GHz) phased-arrays, implemented in 0.25-µm SiGe BiCMOS process. Distributed active switches are utilized in first three bits. On-chip inductances are used to provide 22.5° phase shift steps. The placement and the geometry of these inductances are optimized for minimum phase error and insertion loss. In order to compensate the gain variations of this stage, a single stage variable gain amplifier is used. The fourth bit which provides 0/180° phase shift is obtained in third amplification stage, with switching between common basecommon emitter configuration. With utilization of this technique overall phase error is significantly decreased and overall gain is increased. The phase shifter achieves 7dB gain with 3 dB of gain error. 360° phase shift is achieved in 4 bit resolution with a phase error of 0.5° at center frequency of 10GHz, and maximum 22° phase error in 4.5 GHz bandwidth. The chip size is 2150 µm x 1040 µm including the bondpads. These performance parameters are comparable with the state of the art using similar technology