Fabrication of metallic patterns by microstencil lithography on polymer surfaces suitable as microelectrodes in integrated microfluidic systems

Microstencil lithography, i.e. local deposition of micrometer scale patterns through small shadow masks, is a promising method for metal micropattern definition on polymer substrates that cannot be structured using organic-solvent-based photoresist technology. We propose to apply microstencil lithography to fabricate microelectrodes on flat and 3D polymer substrates, such as PMMA or SU-8, which form parts of microfluidic systems with integrated microelectrodes. Microstencil lithography is accompanied by two main issues when considered for application as a low-cost, reproducible alternative to standard photolithography on polymer substrates. In this paper we assess in detail (i) the reduction of aperture size (clogging) after several metal evaporation steps and corresponding change of deposited pattern size and (ii) loss in the resolution (blurring) of the deposited microstructures when there is a several micrometers large gap between the stencil membrane and the substrate. The clogging of stencil apertures induced by titanium and copper evaporation was checked after each evaporation step, and it was determined that approximately 50% of the thickness of the evaporated metals was deposited on the side walls of the stencil apertures. The influence of a gap on the deposited structures was analyzed by using 18 um thick SU-8 spacers placed between the microstencil and the substrate. The presence of an 18 um gapmade the deposited structures notably blurred. The blurring mechanism of deposited structures is discussed based on a simplified geometrical model. The results obtained in this paper allow assessing the feasibility of using stencil-based lithography for unconventional surface patterning, which shows the limits of the proposed method, but also provides a guideline on a possible implementation for combined polymer-electrode microsystems, where standard photoresist technology fails

Compartmentalization of Gd liposomes: The quenching effect explained

Cationic liposomes carrying high [Gd] can be used as efficient cell-labeling agents. In a compartmentalized state, Gd can cause signal loss (relaxivity quenching). The contributions of liposomal [Gd], size and compartmentalization state to relaxivity quenching were assessed. The dependency of signal intensity (SI) on intraliposomal [Gd] was assessed comparing three different [Gd] (0.3, 0.6 and 1.0M Gd) in both small (80 nm) and large (120 nm) cationic liposomes. In addition, five compartmentalization states were compared: free Gd, intact Gd liposomes, ruptured Gd liposomes, Gd liposomes in intact cells and Gd liposomes in ruptured cells (simulating cell death). Gd also causes R2 effects, which is often overlooked. Therefore, both R1 and R2 relaxation rates of a dilution range were measured by T1 and T2 mapping on a 7T clinical scanner. Less is more. As the unidirectional water efflux rate (outbound across the liposome membrane, κle) is proportional to the surface:volume ratio, smaller liposomes yielded a consistently higher R1 than larger liposomes. For equal voxel [Gd] less concentrated liposomes (0.3M Gd) yielded higher R1/R2 ratio because of the higher extraliposomal water fraction (vl). Gd exhibits a dualistic behavior: from hypointensity to hyperintensity to hypointensity, with decreasing [Gd]. Regarding compartmentalization, fewer membrane barriers means a higher R1/R2 ratio. Gd liposomes exhibit a versatile contrast behavior, dependent on the compartmentalization state, liposomal size, intraliposomal [Gd] and liposome number. Both R1 and R2 effects contribute to this. The versatility allows one to tailor the optimal liposomal formulation to desired goals in cell labeling and tracking

STAMP FABRICATION FOR NANOIMPRINT LITHOGRAPHY BY PATTERN DEFINITION WITH STENCIL LITHOGRAPHY

A silicon stamp for nanoimprint lithography (NIL) was fabricated from the patterns defined by stencil lithography. Since stencil lithography has a capability of producing sub-micron patterns in a single process, we were able to make a silicon stamp with a very simple procedure consisting of only 4 steps. A series of experiments showed that about 200 nm of “defect” structures were well transferred from the stencil to the pattern on silicon stamp for NIL process, which replicates the structures into a silicon substrate by NIL followed by dry etching processes. The presented procedure has a potential to be applied to nanoscale stamp fabrication process

Advancing towards well-controlled full-wafer nanostencil lithography

The endeavour to develop nanodevices demands for patterning methods in the nanoscale. To bring nanodevices to the market, there is a need for fast, low-cost replication nanopatterning methods. In addition, an increased flexibility of the nanopatterning methods is important for the engineering of multimaterial and multifunctional nano/micro-electro-mechanical systems (NEMS/MEMS), such as polymer-based electronic and sensor devices, 3D microfluidic systems, and bio-analytical systems. A series of alternative, complementary surface micro/nanopatterning methods are currently being developed, e.g. local printing of molecular layers (soft-lithography), local fluidic dispensing (NADIS), and shadow-mask deposition (nanostencil lithography). These methods rely on locally adding material onto the substrate without the need for resist layers and etching steps. Nanostencil lithography is a resistless, single step patterning method based on direct, local deposition of material on an arbitrary surface through a solid-state membrane, e.g. a 200-nm thick silicon nitride (SiN) membrane. We present two new stencil membrane geometries and associated MEMS processes that allow for advancing further towards a well-controlled full-wafer (100 mm) nanostencil process for reproducible, high-throughput, large-area nanopatterning of mesoscopic structures (10^9-10^3 m). In fact, the major challenges for well-controlled and reproducible nanostencil lithography are to control stress-induced membrane deformation, clogging of membrane apertures and the gap between stencil and substrate. To limit pattern deformation and blurring, i.e. reduced sharpness of edges and limited spatial detail, we have developed two schemes to incorporate in-situ, local stabilization structures in the stencil membranes. These stabilization structures are adaptable to the membrane apertures and they do not interfere with the material flux during deposition. The stabilized membranes show improved membrane stability (i.e. reduced out-of-plane deformation) up to 94%, resulting in an improved pattern definition of stencil-deposited structures. We have also systematically characterized and will present the clogging of membrane apertures as a function of their size and deposited material. Cu and Ti thin-film deposition through 500-nm thick SiN stencil membranes resulted in half of the film thickness (that was evaporated onto the membrane surface) deposited at the inner sides of the membrane apertures. The stabilized membranes are easier to clean with a reduced risk of damage, increasing the reusability of the stencils. Furthermore, the influence of the gap between stencil and substrate on the deposited structures was determined quantitatively. We have studied patterning by stencil lithography of metals (Al, Au, Bi, Cr, Ti, Cu) on various surfaces (Si, SiO2, SU-8, PDMS, PMMA, freestanding SiN cantilevers, curved surfaces, CMOS chips, and self-assembled monolayers (SAM)) for different applications (nanomechanical devices, (molecular) electronic devices, nanoscale Hall-sensor devices, 3D microfluidic systems)

Application of Microstencil Lithography on Polymer Surfaces for Microfluidic Systems with Integrated Microelectrodes

Microstencil lithography, a resistless, single-step direct vacuum patterning method, is one of promising methods for metal micropattern definition on polymer substrates that are not suitable for conventional photolithography. We propose to apply microstencil lithography to fabricate microelectrodes on flat and pre-structured polymer substrates which form parts of microfluidic systems with incorporated microelectrodes. However, microstencil lithography is accompanied by two main issues when considered as a low-cost, reproducible alternative to standard photolithography on polymer substrates: clogging and blurring. The clogging of stencil apertures induced by metal evaporation was checked in detail, and it was determined that approximately 50 % of the thickness of the evaporated metals was deposited at the side walls of the stencil apertures. The influence of gap presence on the deposited structures was also analyzed experimentally, and we quantified the pattern blurring

Nanostencil Lithography - Quick & Clean: Towards a reliable scalable nanopatterning method

Stencil lithography is a surface patterning technique that relies on the local deposition of material through miniaturized shadow mask membranes. This method has been used since many years in various implementations for the formation of patterns, mainly structured thin metal films, in situations when lithography equipment is not available or when the surfaces don’t allow the harsh process steps typically involved in photolithography such as spin coating of photoresist, high temperature baking, development, wet or dry etching and resist stripping. Stencil lithography is down-sizable into the sub-100-nm scale which makes it very interesting as method for (in-vacuum) rapid-prototyping of nanostructures without the risk of contamination, and for laboratories without access to high-end nanolithography equipment. The major challenges in stencil lithography are following: i) the fabrication of large area nanostencils requires one high-resolution lithography step and sophisticated MEMS processes, ii) the mechanical properties of thin membranes (typically ~ 100 nm thick) requires careful handling, iii) the effect of deposited material on stencil leads to aperture clogging and membrane bending which limits the resolution capabilities, iv) the precise positioning of nanostencils to prefabricated surfaces structures for aligned multiple layer patterning, v) and eventually the recycling of used stencils. Despite these difficulties, stencils are extremely useful tools for flexible and reliable patterning of surface structures across multiple length-scales from mm to sub-100 nm. In collaboration with our project partners we have recently progressed in several of the above mentioned challenges: the fabrication of stencils is now based on a set of advanced silicon micromachining steps including DUV exposure for >200 nm apertures and a combination of DRIE and wet etching. Focused beams are used to fabricate stencils with sub-100 nm apertures. In particular the mechanical stability of the ultra-thin low-stress silicon nitride membranes could be considerably improved by topographic reinforcement rims. As a result, the membranes deform less under the stress of deposited film and consequently the surface patterns are better defined. We have studied patterning by stencil lithography of metals (e.g. Al, Au, Bi, Cr, Ti, Cu) on various surfaces (e.g. Si, SiO2, SU-8, PDMS, PMMA, freestanding SiN cantilevers, and curved surfaces. Pulsed laser deposition of metal on self-assembled monolayers (SAMs) has resulted in novel micro/nanopattern for molecular electronic devices. Parallel fabrication of thousands of sub-micrometer resonating beams that are integrated with CMOS circuitry have been realized by stencil lithography and sacrificial etching. The talk will present the current state-of-the-art of the nanostencil lithography , will highlight the strength of the method but will also discuss the current limits and challenges ahead to make it a truly reliable nanofabrication method