Derived moduli of complexes and derived Grassmannians

In the first part of this paper we construct a model structure for the category of filtered cochain complexes of modules over some commutative ring $R$ and explain how the classical Rees construction relates this to the usual projective model structure over cochain complexes. The second part of the paper is devoted to the study of derived moduli of sheaves: we give a new proof of the representability of the derived stack of perfect complexes over a proper scheme and then use the new model structure for filtered complexes to tackle moduli of filtered derived modules. As an application, we construct derived versions of Grassmannians and flag varieties.Comment: 54 pages, Section 2.4 significantly extended, minor corrections to the rest of the pape

On-Line Instruction-checking in Pipelined Microprocessors

Microprocessors performances have increased by more than five orders of magnitude in the last three decades. As technology scales down, these components become inherently unreliable posing major design and test challenges. This paper proposes an instruction-checking architecture to detect erroneous instruction executions caused by both permanent and transient errors in the internal logic of a microprocessor. Monitoring the correct activation sequence of a set of predefined microprocessor control/status signals allow distinguishing between correctly and not correctly executed instruction

Hodge theory and deformations of affine cones of subcanonical projective varieties:

We investigate the relation between the Hodge theory of a smooth subcanonical n-dimensional projective variety X and the deformation theory of the affine cone A_X over X. We start by identifying H^{n−1,1}_prim(X) as a distinguished graded component of the module of first order deformations of A_X, and later on we show how to identify the whole primitive cohomology of X as a distinguished graded component of the Hochschild cohomology module of the punctured affine cone over X. In the particular case of a projective smooth hypersurface X we recover Griffiths' isomorphism between the primitive cohomology of X and certain distinguished graded components of the Milnor algebra of a polynomial defining X. The main result of the article can be effectively exploited to compute Hodge numbers of smooth subcanonical projective varieties. We provide a few example computation, as well a SINGULAR code, for Fano and Calabi-Yau threefolds

Online self-repair of FIR filters

Chip-level failure detection has been a target of research for some time, but today's very deep-submicron technology is forcing such research to move beyond detection. Repair, especially self-repair, has become very important for containing the susceptibility of today's chips. This article introduces a self-repair-solution for the digital FIR filter, one of the key blocks used in DSPs

Static analysis of SEU effects on software applications

Control flow errors have been widely addressed in literature as a possible threat to the dependability of computer systems, and many clever techniques have been proposed to detect and tolerate them. Nevertheless, it has never been discussed if the overheads introduced by many of these techniques are justified by a reasonable probability of incurring control flow errors. This paper presents a static executable code analysis methodology able to compute, depending on the target microprocessor platform, the upper-bound probability that a given application incurs in a control flow error

AFSM-based deterministic hardware TPG

This paper proposes a new approach for designing a cost-effective, on-chip, hardware pattern generator of deterministic test sequences. Given a pre-computed test pattern (obtained by an ATPG tool) with predetermined fault coverage, a hardware Test Pattern Generator (TPG) based on Autonomous Finite State Machines (AFSM) structure is synthesized to generate it. This new approach exploits "don't care" bits of the deterministic test patterns to lower area overhead of the TPG. Simulations using benchmark circuits show that the hardware components cost is considerably less when compared with alternative solution

Memory read faults: taxonomy and automatic test generation

This paper presents an innovative algorithm for the automatic generation of March tests. The proposed approach is able to generate an optimal March test for an unconstrained set of memory faults in very low computation time. Moreover, we propose a new complete taxonomy for memory read faults, a class of faults never carefully addressed in the past