Pix-ESL: a SystemC framework for architectural modelling of readout systems in HEP

The high cost of prototyping at advanced technology nodes, as well as the complexity of future detectors, necessitate the use of a system design technique widely used in industry: design space exploration through high-level architecture studies to establish precise and optimal requirements. This work presents Pix-ESL: a programmable SystemC framework for simulating the readout chain from the front-end chips to the detector back-end. The model is transaction accurate, comprises an event generator and connects with real-world physics events, and provides metrics such as readout efficiency, latency, and average queue occupancy. This contribution outlines the framework's structure as well as a case study based on Velopix2

Virtual prototyping of pixel detectors with PixESL framework in High Energy Physics

PixESL pioneers a virtual prototyping framework for future particle detectors in high-energy physics. Developed at CERN under the EP R&D Work-Package 5, this framework enables high-level abstraction, simulating the full detector chain from particle interaction to data packet readout. It facilitates early optimization of chip and system architecture, which is critical for meeting experiment specifications. PixESL models crucial components such as analog front-end, digital circuitry, and data readout networks, empowering designers to analyze interactions and optimize performance. Leveraging SystemC, PixESL offers rapid simulation runtime and above-RTL abstraction, presenting a pivotal tool for advancing particle detector design and verification

Radiation-Tolerant SoC and Application-Specific Processors for On-Detector Programmability and Data Processing in Future High-Energy Physics Experiments

The High Energy Physics (HEP) community faces new challenges in designing modern ASICs due to their increasing size and complexity, as well as the use of advanced semiconductor fabrication processes. This has led to a need for a more abstract design methodology that emphasizes the use of modular design techniques and programmable components to speed up the design and verification process. To address these challenges, two complementary approaches are proposed. The first uses a RISC-V based System-on-Chip (SoC) platform employing a radtolerant variant of the AMBA APB bus interconnect, primarily targeting control and monitoring applications. A demonstrator ASIC utilizing this radiation-tolerant SoC platform is presented. The second approach uses Application-Specific Instruction set Processors (ASIPs) to design data path elements for on-detector data processing applications. An integrated workflow is demonstrated using a commercial ASIP Designer EDA tool to define, benchmark, and optimize an ASIP for a specific use case, starting from a general-purpose processor

Changes in hyoid bone position from 6 to 16 years: A longitudinal study

The aim of this study was to evaluate the relationship between hyoid bone position and morphologic characteristic parameters of oropharynx, maxilla and mandibl

Changes in hyoid bone position from 6 to 16 years: A longitudinal study

The aim of this study was to evaluate the relationship between hyoid bone position and morphologic characteristic parameters of oropharynx, maxilla and mandibl

Extension of the R&D Programme on Technologies for Future Experiments

we have conceived an extension of the R&D programme covering the period 2024 to 2028, i.e. again a 5-year period, however with 2024 as overlap year. This step was encouraged by the success of the current programme but also by the Europe-wide efforts to launch new Detector R&D collaborations in the framework of the ECFA Detector R&D Roadmap. We propose to continue our R&D programme with the main activities in essentially the same areas. All activities are fully aligned with the ECFA Roadmap and in most cases will be carried out under the umbrella of one of the new DRD collaborations. The program is a mix of natural continuations of the current activities and a couple of very innovative new developments, such as a radiation hard embedded FPGA implemented in an ASIC based on System-on-Chip technology. A special and urgent topic is the fabrication of Al-reinforced super-conducting cables. Such cables are a core ingredient of any new superconducting magnet such as BabyIAXO, PANDA, EIC, ALICE-3 etc. Production volumes are small and demands come in irregular intervals. Industry (world-wide) is no longer able and willing to fabricate such cables. The most effective approach (technically and financially) may be to re-invent the process at CERN, together with interested partners, and offer this service to the community

Annual Report 2022

This report summarises the activities and main achievements of the CERN strategic R&D programme on technologies for future experiments during the year 202

Annual Report 2023 and Phase-I Closeout

This report summarises the activities of the CERN strategic R&D programme on technologies for future experiments during the year 2023, and highlights the achievements of the programme during its first phase 2020-2023