Analysis and Optimization of Accumulation-Mode Varactor for RF ICs

This paper presents a novel RF IC varactor implemented in standard CMOS process. This device has shown a remarkable tuning range of 150#, sensitivity of 300##V, and quality factor of 23 at 1 GHz. A physical model of the varactor is presented and con#rmed with measured data. Using the model derived, optimization has shown that a Q as high as 200 can be achieved. I. Introduction High quality on-chip varactors are essential to monolithic integration of voltage-controlled oscillators in a Si-based RF ICs. Conventionally, on-chip varactors have been implemented with pn junctions under reverse bias or MOS capacitors in depletion-inversion regime. PN-junction varactors have been reported with quality factor #Q# of less than 7 for capacitance of 1#10 pF at 0.9#2.4 GHz. Typical MOS capacitors can achieve higher Q #14#GHz#pF# with larger capacitance per area #1#. In this paper, we presentanovel varactor based on an NMOS-like structure biased in accumulation-depletion regime. A physical model i..