Extension of the method of lines for the analysis of semiconductor devices

77 p. : ill. ; 30 cThe method of lines is semianalytique for numerical simulation of partial differential equations. Although the various advantages of this method such as simplicity in concept, efficiency, and reduced computer memory space and requirements, its application is still confined in the field of integrated microwave structures..

Rectangular patch antenna performances improvement employing slotted rectangular shaped for WLAN applications

This paper describes the effect of inserting a rectangular shape defected ground structure (DGS) into the ground plane of the conventional rectangular microstrip patch antenna (CRMPA). The performances of the CRMPA are characterized by varying the dimensions of the rectangular slot (RS-DGS) and also by locating the RS-DGS at specific position. Simulation results have verified that the CRMPA including RS- DGS had improved the CRMPA without RS-DGS. The return loss (RL) enhances approximately of 100 %, and gain improvement of 0.8 d

Determination of Potential Profile In Planar Electronic Structures Using A Semi-Analytical Technique

In this paper, a semi-analytical technique known as the Method of Lines (MoL) with uniform and non-uniform discretization schemes is developed. The aim is to determine static potential profile in planar electronic structures. Even though this method has been known for some time, there has been reported work on its application to planar semiconductor device analysis for voltage profile determination. Since most current electronic devices are manufactured using planar and quasi-planar technology, the proposed algorithm is well suited for device analysis prior to fabrication. Compared with known popular methods such as Finite Difference and Finite Elements methods, the proposed technique is relatively simple, more accurate and unlike other methods, has no convergence problem. In addition to this, its semi-analytical nature, which consists of reducing one computing dimension, allows saving significant memory and computation time. Typical planar electronic structures are considered to demonstrate their suitability for these devices, and the obtained results are presented and discussed

Determination of Potential Profile In Planar Electronic Structures Using A Semi-Analytical Technique

 In this paper, a semi-analytical technique known as the Method of Lines (MoL) with uniform and non-uniform discretization schemes is developed. The aim is to determine static potential profile in planar electronic structures. Even though this method has been known for some time, there has been reported work on its application to planar semiconductor device analysis for voltage profile determination. Since most current electronic devices are manufactured using planar and quasi-planar technology, the proposed algorithm is well suited for device analysis prior to fabrication. Compared with known popular methods such as Finite Difference and Finite Elements methods, the proposed technique is relatively simple, more accurate and unlike other methods, has no convergence problem. In addition to this, its semi-analytical nature, which consists of reducing one computing dimension, allows saving significant memory and computation time. Typical planar electronic structures are considered to demonstrate their suitability for these devices, and the obtained results are presented and discussed.

Circuit Modeling and EM Simulation Verification of DGS based Low-Pass Filter Employing Transmission Line Model along with Microstrip-Slotline Transitions

In this paper, an equivalent circuit model (ECM) for a defected ground structure (DGS) pattern is proposed and evaluated for designing a compact low-pass filter (LPF). The proposed ECM is based on microstrip lines and microstrip-slotline transitions. Every slotlines of the DGS unit are modeled by ideals transmission lines of characteristic impedance and electrical length. Comparison between full-wave EM and circuit simulations illustrates the validity of the proposed ECM

Circuit Modeling and EM Simulation Verification of DGS based Low-Pass Filter Employing Transmission Line Model along with Microstrip-Slotline Transitions

In this paper, an equivalent circuit model (ECM) for a defected ground structure (DGS) pattern is proposed and evaluated for designing a compact low-pass filter (LPF). The proposed ECM is based on microstrip lines and microstrip-slotline transitions. Every slotlines of the DGS unit are modeled by ideals transmission lines of characteristic impedance and electrical length. Comparison between full-wave EM and circuit simulations illustrates the validity of the proposed ECM

Comparative study of three shapes of DGS pattern and design of compact microstrip low-pass and band-pass filters

In this paper, three types of defected ground structure (DGS) units which are triangular-head (TH), rectangular-head (RH) and U-shape (US) are investigated and their characteristics are compared each other. Further, they are used in the design of low-pass filters (LPF) and band-pass filters (BPF) and the obtained performances are examined. The LPF employing RS-DGS geometry presents the advantages of compact size, low-insertion loss and wide stopband compared to the other filters. It provides a cutoff frequency at 2.5 GHz, a largest rejection band width of 20 dB from 2.98 to 8.76 GHz, a smallest transition region and a smallest sharpness response at the cutoff frequency. The BPF based on RS-DGS has the highest bandwidth (BW) of about 0.74 GHz and the lowest center frequency of 3.24 GHz whereas the other BPFs have BWs less than 0.7 GHz

Synthesis of linear arrays with sidelobe level reduction constraint using genetic algorithm

The synthesis of uniformly spaced linear array geometries with minimum sidelobe level and beamforming capability using genetic algorithms is presented. The iterative process aims not only at matching the desired pattern to the desired one but minimizing the sidelobe level as well; through optimizing the element excitations. Various examples are included to demonstrate the design effectiveness and flexibility namely for switched smart antenna systems application