Reconfigurable Architectures for Wireless Systems: Design Exploration and Integration Challenges

Mobile devices are severely power and area limited due to battery capacity and system size. In many of these example systems, advanced features require computationally complex signal processing on high-speed data streams for enhanced networking capabilities. Thus, mapping high-level communication and networking algorithms to system architectures is a complex and challenging procedure. An important challenge is to characterize the area, time, and power requirements of these embedded system modules and to use this information effectively to determine the architecture of programmable, reconfigurable, and fixed-function modules. In this paper, we will focus on application examples in wireless networking which highlight these challenges in reconfigurable systems integration.Nokia CorporationTexas Instruments IncorporatedNational Science Foundatio

ASIP Architecture Implementation of Channel Equalization Algorithms for MIMO Systems in WCDMA Downlink

This paper presents a customized and flexible hardware implementation of linear iterative channel equalization algorithms for WCDMA downlink transmission in 3G wireless system with multiple transmit and receive antennas (MIMO system). Optimized (in terms of area and execution time) and power efficient Application Specific Instruction set Processors (ASIPs) based on Transport Triggered Architecture (TTA) are designed that can operate efficiently in slow and fast fading high scattering environments. The instruction set of TTA processors is extended with several user-defined operations specific for channel equalization algorithms that dramatically optimize the architecture solution for the physical layer of the mobile handset. The final results of presented design-space exploration method are the ASIP processors with low cost/performance ratio. Automatic software-hardware co-design flow for conversion of C application code into gate-level hardware design of ASIP architectures is also described. Implemented ASIP solutions achieve real time requirements for 3GPP wireless standard (1xEV-DV standard, in particular) with reasonable clock speed and power dissipation

Optimized Message Passing Schedules for LDPC Decoding

Conference PaperThe major drawback of the LDPC codes versus the turbo-codes is their comparative low convergence speed: 25-30 iterations vs. 8-10 iterations for turbo-codes. Recently, Hocevar showed by simulations that the convergence rate of the LDPC decoder can be accelerated by exploiting a â turbo-schedulingâ applied on the bit-node messages (rows of the parity check matrix). In this paper, we show analytically that the convergence rate for this type of scheduling is about two times increased for most of the regular LDPC codes. Second we prove that â turbo-schedulingâ applied on the rows of the parity check matrix is identical belief propagation algorithm as standard message passing algorithm. Furthermore, we propose two new message passing schedules: 1) a turbo-scheduling is applied on the checknode messages (columns of the parity check matrix); 2) a hybrid version of both previous schedules where the turbo-effect is applied on both check-nodes and bit-nodes. Frame error rate simulations validate the effectiveness of the proposed schedules

Chip level LMMSE Equalization for Downlink MIMO CDMA in fast fading environments

In this paper , we consider linear MMSE equalization for the wireless downlink transmission with multiple transmit and receive antennas in fast fading environment. We propose a new algorithm based on CG algorithm with enhanced channel estimation. Indeed, in order to be robust to the channel variations, we estimated the channel estimates by using a weighted sliding window. Two methods in order to determine optimal weights are proposed. The new algorithm has been tested in fast fading environment (Vehicular A for a velocity for the mobile station of 120 km/h). We show by simulations that the proposed algorithm gives good performance in correlated fast fading environment with reasonable complexity. Moreover, it outperforms approaches based on forgetting factor, basic sliding window and LMS

Chip level LMMSE Equalization for Downlink MIMO CDMA in fast fading environments

Conference paperIn this paper, we consider linear MMSE equalization for wireless downlink transmission with multiple transmit and receive antennas in fast fading environment. We propose a new algorithm based on conjugate-gradient algorithm with enhanced channel estimation. In order to be robust to the channel variations, the channel coefficients are estimated by using a weighted sliding window. Two methods to determine optimal weights with respect to the Doppler frequency are proposed. The algorithm has been tested in fast fading environment (Vehicular A for a velocity for the mobile station of 120 km/h). We show by simulations that good performance are obtained in correlated fast fading environment with reasonable complexity. Moreover, this method outperforms approaches based on forgetting factor, basic sliding window and LMS.NokiaNokia/Texas Instrument

On Turbo-Schedules for LDPC Decoding

Journal PaperThe convergence rate of LDPC decoding is comparatively slower than turbo code decoding: 25 LDPC iterations versus 8-10 iterations for turbo codes. Recently, Mansour proposed a â turbo-scheduleâ to improve the convergence rate of LDPC decoders. In this letter, we first extend the turbo-scheduling principle to the check messages. Second, we show analytically that the convergence rate of both turbo-schedules is about twice as fast as the standard message passing algorithm for most LDPC codes