A Design Space Exploration Framework in

Abstract: The traditional design space exploration methodology suits the single processor system-on-chip (SoC), which has fixed allocated components and embedded-system designer has to partition the specification between hardware and software. However, in multiprocessor SoC, allocation is not fixed. The design-space becomes very large when the target architecture consists of heterogeneous components, which is not possible to explore in a very short time frame. This paper aims at providing numerical guideline to choose processor type and their numbers in hardware-software codesign environment. A new stage in the design cycle is introduced called “Pre-Allocation ” which determines the number and type of components required for the implementation at system-level based on performance estimation. For multiprocessor-based embedded SoC, pre-allocation can reduce considerable design-time

Analysis and Improvement of Task Schedulability in Hardware/Software Codesign

Many real-time systems have timing requirements that are difficult to fulfil if the system is implemented by software running on a microprocessor. One way to remedy this problem is to implement the most timecritical parts in application-specific integrated circuits instead. Hardware/software codesign aims at providing support for the designer of such a heterogeneously implemented system, and especially at finding ways to determine what parts should be implemented in what technology. In this paper, we discuss an approach to codesign which has as its objective to find an implementation of a real-time system, which allows the deadlines to be met. The main result presented is a schedulability evaluation method, and we describe how this can be used to guide the partitioning of the system behaviour onto the different components of a hardware architecture. 1 Introduction The field of hardware/software codesign (or simply codesign, for short) has received increasing attention during the last ..

Integrating Communication Protocol Selection with Hardware/Software Codesign

This paper explores the problem of determining the characteristics of the communication links in a computer system as well as determining the best functional partitioning. In particular, we present a communication estimation model and show, by the use of this model, the importance of integrating communication protocol selection with hardware/software partitioning. The communication estimation model allows for fast estimation but is still sufficiently detailed as to allow the designer or design tool to efficiently explore tradeoffs between throughputs, bus widths, burst/nonburst transfers, operating frequencies of system components such as buses, CPU's, ASIC's, software code size, hardware area, and component prices. A distinct feature of the model is the modeling of driver processing of data (packing, splitting, compression, etc.) and its impact on communication throughput. The integration of communication protocol selection and communication driver design with hardware/software partit..

Codesign with SDL/MSC

: The Specification and Description Language (SDL) and Message Sequence Charts (MSC) are playing a major role in the development of complex systems especially in the telecommunication area. SDL and MSC support the description and validation of systems at a higher level of abstraction as conventional languages as C or Pascal. SDL is especially suited for the hierarchical design of parallel and distributed applications. Today the synthesis of software from SDL specifications is already supported by commercial CASE tools as well as many proprietary tools. The high level of abstraction makes SDL a prime candidate as input language for HW/SW codesign. However, SDL is focusing on functional aspects of the system. Thus, there is only very limited support to deal with performance and time aspects. On the other hand, dealing with time and performance is essential with real-time systems and for codesign. In the paper we show how the SDL methodology can be extended to deal with real-time constrai..