Subthermionic negative capacitance ion sensitive field-effect transistor

One of the main advantages of Ion-Sensitive Field-Effect Transistor (ISFET) technology is the capability to exploit technological advancements initially developed for conventional FETs for logic applications, such as the employ of high-k dielectrics for the gate and the definition of fully depleted and gate all around structures. Negative Capacitance (NC) is an emerging concept exploiting ferroelectric materials integrated in field effect transistor gate stacks in order to decrease their subthreshold swing and improve the drain current (I-D) overdrive in order to reach more energy efficient devices, operated at lower voltage. In this work, we investigate and experimentally demonstrate the application of this concept to enable subthermionic ISFETs with enhanced current sensitivity and low power operation. A physical model for the introduced NC ISFET is presented and optimized by fitting of the experimental results, providing further insights into the sensor parameters and a predictive tool for the design of future NC-based sensors