RFID Tag Reader Designs for Retail Store Applications

Current RFID tag readers do not do much more than reading the tags and transmitting that information to a central server for processing. This places a heavy burden on the central server to keep track of all the incoming data from the reader when it can be spending its time more gainfully on other tasks. We propose building some intelligence into RFID tag readers so that they can process some of the data themselves and reduce the load on the central server. We discuss the technical details of building this intelligence in the four key functions of tag readers: (A) Automatic initialization of the tag readers, (B) Automatic identification of misplaced items, (C) Automatic generation of shelf replenishment alerts, and (D) Automatic generation of reorder alerts. In addition, we discuss possible network designs for interconnecting the tag readers and the central transaction server at the retail store. We provide a database model for storing transactions generated by RFID tag reads. We discuss how the current enterprise architectures can be modified to accommodate RFID transactions

RFID technology as sustaining or disruptive innovation: Applications in the healthcare industry

Abstract In this paper we use the implementation of radio frequency identification (RFID) in various sectors of the healthcare industry as an illustration and application of how academics and managers may assess the potential for new technologies to be sustaining or disruptive to an organization. We review RFID technology, summarize literature related to disruptive innovation, develop a qualitative framework that examines the sustaining and disruptive potential of RFID, and discuss examples of healthcare applications within the context of this framework

APEnet+: high bandwidth 3D torus direct network for petaflops scale commodity clusters

We describe herein the APElink+ board, a PCIe interconnect adapter featuring the latest advances in wire speed and interface technology plus hardware support for a RDMA programming model and experimental acceleration of GPU networking; this design allows us to build a low latency, high bandwidth PC cluster, the APEnet+ network, the new generation of our cost-effective, tens-of-thousands-scalable cluster network architecture. Some test results and characterization of data transmission of a complete testbench, based on a commercial development card mounting an Altera FPGA, are provided.Comment: 6 pages, 7 figures, proceeding of CHEP 2010, Taiwan, October 18-2

Fault-Tolerant Wormhole Routing in Tori

. We present a method to enhance wormhole routing algorithms for deadlock-free fault-tolerant routing in tori. We consider arbitrarily-located faulty blocks and assume only local knowledge of faults. Messages are routed via shortest paths when there are no faults, and this constraint is only slightly relaxed to facilitate routing in the presence of faults. The key concept we use is that, for each fault region, a fault ring consisting of fault free nodes and physical channels can be formed around it. These fault rings can be used to route messages around fault regions. We prove that at most four additional virtual channels are sufficient to make any fully-adaptive algorithm tolerant to multiple faulty blocks in torus networks. As an example of this technique, we present simulation results for a fully-adaptive algorithm and show that good performance can be obtained with as many as 10% links faulty. Keywords: adaptive routing, deadlocks, fault-tolerant routing, multicomputer networks, m..