9 research outputs found

    Physical Realization of a Supervised Learning System Built with Organic Memristive Synapses

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    International audienceMultiple modern applications of electronics call for inexpensive chips that can perform complex operations on natural data with limited energy. A vision for accomplishing this is implementing hardware neural networks, which fuse computation and memory, with low cost organic electronics. A challenge, however, is the implementation of synapses (analog memories) composed of such materials. In this work, we introduce robust, fastly programmable, nonvolatile organic memristive nanodevices based on electrografted redox complexes that implement synapses thanks to a wide range of accessible intermediate conductivity states. We demonstrate experimentally an elementary neural network, capable of learning functions, which combines four pairs of organic memristors as synapses and conventional electronics as neurons. Our architecture is highly resilient to issues caused by imperfect devices. It tolerates inter-device variability and an adaptable learning rule offers immunity against asymmetries in device switching. Highly compliant with conventional fabrication processes, the system can be extended to larger computing systems capable of complex cognitive tasks, as demonstrated in complementary simulations

    Neuro-inspired architectures for nano-circuits

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    Les nouvelles techniques de fabrication nanométriques comme l’auto-assemblage ou la nanoimpression permettent de réaliser des matrices régulières (crossbars) atteignant des densités extrêmes (jusqu’à 1012 nanocomposants/cm2) tout en limitant leur coût de fabrication. Cependant, il est attendu que ces technologies s’accompagnent d’une augmentation significative du nombre de défauts et de dispersions de caractéristiques. La capacité à exploiter ces crossbars est alors conditionnée par le développement de nouvelles techniques de calcul capables de les spécialiser et de tolérer une grande densité de défauts. Dans ce contexte, l’approche neuromimétique qui permet tout à la fois de configurer les nanodispositifs et de tolérer leurs défauts et dispersions de caractéristiques apparaît spécialement pertinente. L’objectif de cette thèse est de démontrer l’efficacité d’une telle approche et de quantifier la fiabilité obtenue avec une architecture neuromimétique à base de crossbar de memristors, ou neurocrossbar (NC). Tout d’abord la thèse introduit des algorithmes permettant l’apprentissage de fonctions logiques sur un NC. Par la suite, la thèse caractérise la tolérance du modèle NC aux défauts et aux variations de caractéristiques des memristors. Des modèles analytiques probabilistes de prédiction de la convergence de NC ont été proposés et confrontés à des simulations Monte-Carlo. Ils prennent en compte l’impact de chaque type de défaut et de dispersion. Grâce à ces modèles analytiques il devient possible d’extrapoler cette étude à des circuits NC de très grande taille. Finalement, l’efficacité des méthodes proposées est expérimentalement démontrée à travers l’apprentissage de fonctions logiques par un NC composé de transistors à nanotube de carbone à commande optique (OG-CNTFET).Novel manufacturing techniques, such as nanoscale self-assembly or nanoimprint, allow a cost-efficient way to fabricate high-density crossbar matrices (1012 nanodevices/cm2). However, it is expected that these technologies will be accompanied by a significant increase of defects and dispersion in device characteristics. Thus, programming these crossbars require new computational techniques that possess high tolerance for such variations. In this context, approaches based on neural networks are promising for configuring nanodevices, since they provide a natural way for tolerating low yields and device variations. The main objective of this thesis is to explore such a neural-network approach, by examining factors such as efficiency and reliability, using the memristor crossbar architecture or neurocrossbar (NC). We introduce algorithms for learning the logic functions on the NC, and the tolerance of NC against static defects (stuck-defect) and dispersion of device properties is discussed. Probabilistic analytical models for predicting the convergence of NC are proposed and compared with Monte Carlo simulations, which take into account the impact of each type of defect and dispersion. These analytical models can be extrapolated to study large-sized NCs. Finally, the effectiveness of the proposed methods is experimentally demonstrated through the learning of logic functions by a real NC made of Optically Gated Carbon Nanotube Field Effect Transistor (OG-CNTFET)

    Architectures de circuits nanoélectroniques neuro-inspirée

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    Novel manufacturing techniques, such as nanoscale self-assembly or nanoimprint, allow a cost-efficient way to fabricate high-density crossbar matrices (1012 nanodevices/cm2). However, it is expected that these technologies will be accompanied by a significant increase of defects and dispersion in device characteristics. Thus, programming these crossbars require new computational techniques that possess high tolerance for such variations. In this context, approaches based on neural networks are promising for configuring nanodevices, since they provide a natural way for tolerating low yields and device variations. The main objective of this thesis is to explore such a neural-network approach, by examining factors such as efficiency and reliability, using the memristor crossbar architecture or neurocrossbar (NC). We introduce algorithms for learning the logic functions on the NC, and the tolerance of NC against static defects (stuck-defect) and dispersion of device properties is discussed. Probabilistic analytical models for predicting the convergence of NC are proposed and compared with Monte Carlo simulations, which take into account the impact of each type of defect and dispersion. These analytical models can be extrapolated to study large-sized NCs. Finally, the effectiveness of the proposed methods is experimentally demonstrated through the learning of logic functions by a real NC made of Optically Gated Carbon Nanotube Field Effect Transistor (OG-CNTFET).Les nouvelles techniques de fabrication nanométriques comme l’auto-assemblage ou la nanoimpression permettent de réaliser des matrices régulières (crossbars) atteignant des densités extrêmes (jusqu’à 1012 nanocomposants/cm2) tout en limitant leur coût de fabrication. Cependant, il est attendu que ces technologies s’accompagnent d’une augmentation significative du nombre de défauts et de dispersions de caractéristiques. La capacité à exploiter ces crossbars est alors conditionnée par le développement de nouvelles techniques de calcul capables de les spécialiser et de tolérer une grande densité de défauts. Dans ce contexte, l’approche neuromimétique qui permet tout à la fois de configurer les nanodispositifs et de tolérer leurs défauts et dispersions de caractéristiques apparaît spécialement pertinente. L’objectif de cette thèse est de démontrer l’efficacité d’une telle approche et de quantifier la fiabilité obtenue avec une architecture neuromimétique à base de crossbar de memristors, ou neurocrossbar (NC). Tout d’abord la thèse introduit des algorithmes permettant l’apprentissage de fonctions logiques sur un NC. Par la suite, la thèse caractérise la tolérance du modèle NC aux défauts et aux variations de caractéristiques des memristors. Des modèles analytiques probabilistes de prédiction de la convergence de NC ont été proposés et confrontés à des simulations Monte-Carlo. Ils prennent en compte l’impact de chaque type de défaut et de dispersion. Grâce à ces modèles analytiques il devient possible d’extrapoler cette étude à des circuits NC de très grande taille. Finalement, l’efficacité des méthodes proposées est expérimentalement démontrée à travers l’apprentissage de fonctions logiques par un NC composé de transistors à nanotube de carbone à commande optique (OG-CNTFET)

    Architectures de circuits nanoélectroniques neuro-inspirée.

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    Les nouvelles techniques de fabrication nanométriques comme l auto-assemblage ou la nanoimpression permettent de réaliser des matrices régulières (crossbars) atteignant des densités extrêmes (jusqu à 1012 nanocomposants/cm2) tout en limitant leur coût de fabrication. Cependant, il est attendu que ces technologies s accompagnent d une augmentation significative du nombre de défauts et de dispersions de caractéristiques. La capacité à exploiter ces crossbars est alors conditionnée par le développement de nouvelles techniques de calcul capables de les spécialiser et de tolérer une grande densité de défauts. Dans ce contexte, l approche neuromimétique qui permet tout à la fois de configurer les nanodispositifs et de tolérer leurs défauts et dispersions de caractéristiques apparaît spécialement pertinente. L objectif de cette thèse est de démontrer l efficacité d une telle approche et de quantifier la fiabilité obtenue avec une architecture neuromimétique à base de crossbar de memristors, ou neurocrossbar (NC). Tout d abord la thèse introduit des algorithmes permettant l apprentissage de fonctions logiques sur un NC. Par la suite, la thèse caractérise la tolérance du modèle NC aux défauts et aux variations de caractéristiques des memristors. Des modèles analytiques probabilistes de prédiction de la convergence de NC ont été proposés et confrontés à des simulations Monte-Carlo. Ils prennent en compte l impact de chaque type de défaut et de dispersion. Grâce à ces modèles analytiques il devient possible d extrapoler cette étude à des circuits NC de très grande taille. Finalement, l efficacité des méthodes proposées est expérimentalement démontrée à travers l apprentissage de fonctions logiques par un NC composé de transistors à nanotube de carbone à commande optique (OG-CNTFET).Novel manufacturing techniques, such as nanoscale self-assembly or nanoimprint, allow a cost-efficient way to fabricate high-density crossbar matrices (1012 nanodevices/cm2). However, it is expected that these technologies will be accompanied by a significant increase of defects and dispersion in device characteristics. Thus, programming these crossbars require new computational techniques that possess high tolerance for such variations. In this context, approaches based on neural networks are promising for configuring nanodevices, since they provide a natural way for tolerating low yields and device variations. The main objective of this thesis is to explore such a neural-network approach, by examining factors such as efficiency and reliability, using the memristor crossbar architecture or neurocrossbar (NC). We introduce algorithms for learning the logic functions on the NC, and the tolerance of NC against static defects (stuck-defect) and dispersion of device properties is discussed. Probabilistic analytical models for predicting the convergence of NC are proposed and compared with Monte Carlo simulations, which take into account the impact of each type of defect and dispersion. These analytical models can be extrapolated to study large-sized NCs. Finally, the effectiveness of the proposed methods is experimentally demonstrated through the learning of logic functions by a real NC made of Optically Gated Carbon Nanotube Field Effect Transistor (OG-CNTFET).PARIS11-SCD-Bib. électronique (914719901) / SudocSudocFranceF

    Robust neural logic block (NLB) based on memristor crossbar array

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    International audience—Neural networks are considered as promising candidates for implementing functions in memristor crossbar array with high tolerance to device defects and variations. Based on such arrays, Neural Logic Blocks (NLB) with learning capability can be built to replace Configurable Logic Block (CLB) in programmable logic circuits. In this article, we describe a neural learning method to implement Boolean functions in memristor NLB. By using Monte-Carlo simulation, we demonstrate its high robustness against most important device defects and variations, like static defects and memristor voltage threshold variability

    Nanodevice-based novel computing paradigms and the neuromorphic approach

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    International audience— Deep submicron (<90nm) Integrated Circuits (IC) suffer from both high static and dynamic power consumption, which are caused respectively by the growing leakage currents and large capacitance bus traffic. Nanodevice based novel computing paradigms are currently under intense investigation to overcome these issues and build up the next generation ICs performing with higher power efficiency and operating performance. In this paper, an overview and current status of this field is first presented, and then we focus on the memristive nanodevices based neuromorphic approach, which is considered as one of the most promising computing paradigms for power reduction and process variation or defect tolerance

    Supervised Learning with Organic Memristor Devices and Prospects for Neural Crossbar Arrays

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    International audienceThe integration of memristive nanodevices within transistor-based electronic systems offers the potential for computing structures smaller, lower power and cheaper than traditional high-performance systems. Among emerging memristive technologies, a novel device based on organic materials distinguishes itself, in that it can feature several threshold voltages on the same die, and possesses unipolar behavior. In this work, we highlight that these two features can be beneficial for neural network-inspired learning systems. An on-chip supervised learning method for hybrid memristors / CMOS systems — an analogue synaptic array paired with a hybrid learning cell — is extended to the case of this novel organic memristor device. The organic device can be trained with only one pulse per row (two for the entire array) per presentation of input — as compared to four for a bipolar memristor array. The device also works universally- in both the synaptic grid as well as learning cell-paving the way to single die integration. The proposed scheme learns successfully, even while incorporating non-ideal circuit phenomena such as a wide range of parasitic wire resistances and associated sneak paths. These encouraging first results suggest that these multi-threshold, unipolar organic memristive devices are a useful species for inclusion in adaptive next generation electronic system

    Electro-grafted Organic Memristors as Synapses: Spike Timing-Dependent Plasticity and Supervised Function Learning

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    International audienceNeuromorphic computing is an efficient way to handle complex tasks such as image recognition andclassification. Hardware implementation of an artificial neural network (ANN) requires arrays of scalablememory elements to act as artificial synapses. Memristors, which are two-terminal analog memory devices,are excellent candidates for this application as their tunable resistance could be used to code and storesynaptic weights. We studied metal-organic-metal memristors in which the organic layer is a dense androbust electro-grafted thin film of redox complexes. The process allows fabricating planar and verticaljunctions, as well as small crossbar arrays. The unipolar devices display non-volatile multi-levelconductivity states with high Rmax/Rmin ratio and two thresholds. We characterized in depth thecharacteristics of individual memristors with respect to the targeted synaptic function. We notably showedthat they possess the Spike Timing-Dependent Plasticity (STDP) property (their conductivity evolves as afunction of the time-delay between incoming pulses at both terminals), which is critical for futureapplications in neuromorphic circuits based on unsupervised learning. In parallel, we implemented memristors as synapses in a simple prototype: a mixed circuit with the neuron implemented withconventional electronics. This ANN is able to learn linearly separable 3-input logic functions through aniterative supervised learning algorithm inspired by the Widrow-Hoff rule

    Electro-grafted Organic Memristors as Synapses: Spike Timing-Dependent Plasticity and Supervised Function Learning

    Get PDF
    International audienceNeuromorphic computing is an efficient way to handle complex tasks such as image recognition andclassification. Hardware implementation of an artificial neural network (ANN) requires arrays of scalablememory elements to act as artificial synapses. Memristors, which are two-terminal analog memory devices,are excellent candidates for this application as their tunable resistance could be used to code and storesynaptic weights. We studied metal-organic-metal memristors in which the organic layer is a dense androbust electro-grafted thin film of redox complexes. The process allows fabricating planar and verticaljunctions, as well as small crossbar arrays. The unipolar devices display non-volatile multi-levelconductivity states with high Rmax/Rmin ratio and two thresholds. We characterized in depth thecharacteristics of individual memristors with respect to the targeted synaptic function. We notably showedthat they possess the Spike Timing-Dependent Plasticity (STDP) property (their conductivity evolves as afunction of the time-delay between incoming pulses at both terminals), which is critical for futureapplications in neuromorphic circuits based on unsupervised learning. In parallel, we implemented memristors as synapses in a simple prototype: a mixed circuit with the neuron implemented withconventional electronics. This ANN is able to learn linearly separable 3-input logic functions through aniterative supervised learning algorithm inspired by the Widrow-Hoff rule
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