Systematic study of contact annealing: Ambipolar silicon nanowire transistor with improved performance

High performance ambipolar silicon nanowire (SiNW) transistors were fabricated. SiNWs with uniform oxide sheath thicknesses of 6–7 nm were synthesized via a gas-flow-controlled thermal evaporation method. Field effect transistors (FETs) were fabricated using as-grown SiNWs. A two step annealing process was used to control contacts between SiNW and metal source and drain in order to enhance device performance. Initially ρ-channel devices exhibited ambipolar behavior after contact annealing at 400 ºC. Significant increases in on/off ratio and channel mobility were also achieved by annealing

Synthesis and Post-growth Doping of Silicon Nanowires

High quality silicon nanowires (SiNWs) were synthesized via a thermal evaporation method without the use of catalysts. Scanning electron microscopy and transmission electron microscopy showed that SiNWs were long and straight crystalline silicon with an oxide sheath. Field effect transistors (FETs) were fabricated to investigate the electrical transport properties. Devices on as-grown material were p-channel with channel mobilities 1 - 10 cm2 V-1 s-1. Post-growth vapor doping with bismuth converted these to n-channel behavior

Silicon Nanowires: Doping Dependent N- And P- Channel FET Behavior

The electrical transport properties of field effect transistor (FET) devices made of silicon nanowires (SiNWs) synthesized by pulsed laser vaporization (PLV) were studied. From as-grown PLV-SiNW FET, we found p-channel FET behavior with low conductance. To improve conductance, spin on glass (SOG) and vapor doping were used to dope phosphorus and indium into SiNW, respectively. From doping after synthesis, we could successfully make both n- and p-channel FET devices

Applications of electron microscopy to the characterization of semiconductor nanowires

We review our current progress on semiconductor nanowires of β-Ga2O3, Si and GaN. These nanowires were grown using both vapor–solid (VS) and vapor–liquid–solid (VLS) mechanisms. Using transmission electron microscopy (TEM) we studied their morphological, compositional and structural characteristics. Here we survey the general morphologies, growth directions and a variety of defect structures found in our samples. We also outline a method to determine the nanowire growth direction using TEM, and present an overview of device fabrication and assembly methods developed using these nanowires

Synthesis and properties of silicon nanowire devices

Silicon nanowire (SiNW) is a very attractive one-dimensional material for future nanoelectronic applications. Reliable control of key field effect transistor (FET) parameters such as conductance, mobility, threshold voltage and on/off ratio is crucial to the applications of SiNW to working logic devices and integrated circuits. In this thesis, we fabricated silicon nanowire field effect transistors (SiNW FETs) and studied the dependence of their electrical transport properties upon various parameters including SiNW growth conditions, post-growth doping, and contact annealing. From these studies, we found how different processes control important FET characteristics. Key accomplishments of this thesis include p-channel enhancement mode FETs, n-channel FETs by post-growth vapor doping and high performance ambipolar devices. In the first part of this work, single crystalline SiNWs were synthesized by thermal evaporation without gold catalysts. FETs were fabricated using both as-grown SiNWs and post-growth n-doped SiNWs. FET from p-type source materials behaves as a p-channel enhancement mode FET which is predominant in logic devices due to its fast operation and low power consumption. Using bismuth vapor, the as-grown SiNWs were doped into n-type materials. The majority carriers in SiNWs can therefore be controlled by proper choice of the vapor phase dopant species. Post-growth doping using vapor phase is applicable to other nanowire systems. In the second part, high performance ambipolar FETs were fabricated. A two step annealing process was used to control the Schottky barrier between SiNW and metal contacts in order to enhance device performance. Initial p-channel SiNW FETs were converted into ambipolar SiNW FETs after contact annealing. Furthermore, significant increases in both on/off ratio and channel mobilities were achieved after contact annealing. Promising device structures to implement ambipolar devices into large scale integrated circuits were proposed. The contributions of this study are to further understanding of the electrical transport properties of SiNWs and to provide optimized processes to fabricate emerging high performance nanoelectronic devices using SiNWs for future generation beyond bulk silicon

Synthesis and properties of silicon nanowire devices

Silicon nanowire (SiNW) is a very attractive one-dimensional material for future nanoelectronic applications. Reliable control of key field effect transistor (FET) parameters such as conductance, mobility, threshold voltage and on/off ratio is crucial to the applications of SiNW to working logic devices and integrated circuits. In this thesis, we fabricated silicon nanowire field effect transistors (SiNW FETs) and studied the dependence of their electrical transport properties upon various parameters including SiNW growth conditions, post-growth doping, and contact annealing. From these studies, we found how different processes control important FET characteristics. Key accomplishments of this thesis include p-channel enhancement mode FETs, n-channel FETs by post-growth vapor doping and high performance ambipolar devices. In the first part of this work, single crystalline SiNWs were synthesized by thermal evaporation without gold catalysts. FETs were fabricated using both as-grown SiNWs and post-growth n-doped SiNWs. FET from p-type source materials behaves as a p-channel enhancement mode FET which is predominant in logic devices due to its fast operation and low power consumption. Using bismuth vapor, the as-grown SiNWs were doped into n-type materials. The majority carriers in SiNWs can therefore be controlled by proper choice of the vapor phase dopant species. Post-growth doping using vapor phase is applicable to other nanowire systems. In the second part, high performance ambipolar FETs were fabricated. A two step annealing process was used to control the Schottky barrier between SiNW and metal contacts in order to enhance device performance. Initial p-channel SiNW FETs were converted into ambipolar SiNW FETs after contact annealing. Furthermore, significant increases in both on/off ratio and channel mobilities were achieved after contact annealing. Promising device structures to implement ambipolar devices into large scale integrated circuits were proposed. The contributions of this study are to further understanding of the electrical transport properties of SiNWs and to provide optimized processes to fabricate emerging high performance nanoelectronic devices using SiNWs for future generation beyond bulk silicon