High resolution imprinting for microelectronics and photovoltaics

Nanoimprint lithography (NIL) has established itself as a competitive, high resolution and cost efficient alternative to standard photolithographic technologies. In the pursuit of the use of NIL in microelectronic and energy applications, such as fabrication of interlayer dielectrics and hybrid solar cells, we present our study on porous dielectrics and semiconductor nanowires generated by NIL. First, we developed a facile but powerful manufacturing route to fabricate air gap dielectrics with well-defined pore geometries. A thermally labile organic polymer, denoted as sacrificial template, was patterned using thermal NIL and embedded in a lowk dielectric thin film. Air gap nanochannels in the dielectric layer were obtained by selective removal of the patterned, sacrificial polymer through thermal degradation. Various process conditions such as film deposition, imprint, etch, and calcination were studied to deduce their effect on the air gap dielectric film formation. By finely tuning these parameters, crack free air gap dielectric films were produced. Introduction of air gaps effectively lowered the dielectric constant of the dielectric material since air has a dielectric constant of unity. These air gap structures demonstrated excellent electrical, thermal and mechanical properties making them attractive candidates as interlayer dielectrics for next-generation integrated circuit (IC) applications. In addition, we explored the suitability of the nanochannel dielectrics as fluidic devices and demonstrated successful fluid transport through these channels by fluorescence dye infusion experiments. Inspired by the above methodology, we further developed a new, potentially low-cost and high-throughput technique to fabricate highly crystalline, continuous cadmium selenide (CdSe) semiconductor nanowires by successfully merging electrodeposition and soft nanoimprint lithography. By utilizing nanoimprint patterned photoresists as templates during the electrodeposition step and subsequent resist lift-off, we were able to generate continuous parallel arrays of CdSe nanowires, each wire having dimensions dictated by the imprint mold. We demonstrated that the electrodeposited nanowires were highly crystalline and their crystalline structure was unaffected by the lift off process. Our method allowed production of well-aligned CdSe semiconductor nanowire arrays of precisely controlled diameter and length and led to a substantial improvement over the control in nanowire orientation compared to existing technologies. This economic and relatively simple approach can easily be implemented and adapted to various semiconductor systems and is expected to be used in photovoltaic applications