4 research outputs found

    [Artifact] Deductive Verification of Parameterized Embedded Systems modeled in SystemC

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    This is the artifact for the paper Deductive Verification of Parameterized Embedded Systems modeled in SystemC. It contains software that enables the deductive verification of SystemC designs by transforming SystemC to PVL, as well as software to automatically generate global invariants that aid in deductive verification of global properties. Furthermore, the artifact contains files that support the paper's experiments. It contains SystemC case studies and pre-generated PVL translations that were used in the experiments. It also contains detailed instructions for general use of the included tools and for the replication of the experiments. For this, see the included README.pdf. The artifact files are packaged in a VirtualBox virtual machine running Ubuntu 22.04.3 LTS, with all requirements pre-installed. Both username and password for the virtual machine image are "artifact" (without quotes). In addition to this, the relevant files of the artifact are also packaged in a separate .zip file.Contains .ova virtual machine image with all software requirements pre-installed, as well as .zip archive with artifact files only

    Deductive Verification of Parameterized Embedded Systems Modeled in SystemC

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    Major strengths of deductive verification include modular verification and support for functional properties and unbounded parameters. However, in embedded systems, crucial safety properties often depend on concurrent process interactions, events, and time. Such properties are global in nature and thus difficult to verify in a modular fashion. Furthermore, the execution and scheduling semantics of industrially used embedded system design languages such as SystemC are typically only informally defined. In this paper, we propose a deductive verification approach for embedded systems that are modeled with SystemC. Our main contribution is twofold: 1) We provide a formal encoding and an automated transformation of SystemC designs for verification with the VerCors deductive verifier. 2) We present a novel approach for invariant construction to abstractly capture global dependencies. Our encoding enables an automated formalization and deductive verification of parameterized SystemC designs, and the invariant construction enables local reasoning about global properties with comparatively low manual effort. We demonstrate the applicability of our approach on three parameterized case studies, including an automotive control system.</p
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