6 research outputs found
Silicon Photonic Architecture for Training Deep Neural Networks with Direct Feedback Alignment
There has been growing interest in using photonic processors for performing
neural network inference operations; however, these networks are currently
trained using standard digital electronics. Here, we propose on-chip training
of neural networks enabled by a CMOS-compatible silicon photonic architecture
to harness the potential for massively parallel, efficient, and fast data
operations. Our scheme employs the direct feedback alignment training
algorithm, which trains neural networks using error feedback rather than error
backpropagation, and can operate at speeds of trillions of multiply-accumulate
(MAC) operations per second while consuming less than one picojoule per MAC
operation. The photonic architecture exploits parallelized matrix-vector
multiplications using arrays of microring resonators for processing
multi-channel analog signals along single waveguide buses to calculate the
gradient vector for each neural network layer in situ. We also experimentally
demonstrate training deep neural networks with the MNIST dataset using on-chip
MAC operation results. Our novel approach for efficient, ultra-fast neural
network training showcases photonics as a promising platform for executing AI
applications.Comment: 15 pages, 6 figure
Silicon photonics for artificial intelligence applications
Artificial intelligence enabled by neural networks has enabled applications in many fields (e.g. medicine, finance, autonomous vehicles). Software implementations of neural networks on conventional computers are limited in speed and energy efficiency. Neuromorphic engineering aims to build processors in which hardware mimic neurons and synapses in brain for distributed and parallel processing. Neuromorphic engineering enabled by silicon photonics can offer subnanosecond latencies, and can extend the domain of artificial intelligence applications to high-performance computing and ultrafast learning. We discuss current progress and challenges on these demonstrations to scale to practical systems for training and inference
Primer on silicon neuromorphic photonic processors: architecture and compiler
Microelectronic computers have encountered challenges in meeting all of today’s demands for information processing. Meeting these demands will require the development of unconventional computers employing alternative processing models and new device physics. Neural network models have come to dominate modern machine learning algorithms, and specialized electronic hardware has been developed to implement them more efficiently. A silicon photonic integration industry promises to bring manufacturing ecosystems normally reserved for microelectronics to photonics. Photonic devices have already found simple analog signal processing niches where electronics cannot provide sufficient bandwidth and reconfigurability. In order to solve more complex information processing problems, they will have to adopt a processing model that generalizes and scales. Neuromorphic photonics aims to map physical models of optoelectronic systems to abstract models of neural networks. It represents a new opportunity for machine information processing on sub-nanosecond timescales, with application to mathematical programming, intelligent radio frequency signal processing, and real-time control. The strategy of neuromorphic engineering is to externalize the risk of developing computational theory alongside hardware. The strategy of remaining compatible with silicon photonics externalizes the risk of platform development. In this perspective article, we provide a rationale for a neuromorphic photonics processor, envisioning its architecture and a compiler. We also discuss how it can be interfaced with a general purpose computer, i.e. a CPU, as a coprocessor to target specific applications. This paper is intended for a wide audience and provides a roadmap for expanding research in the direction of transforming neuromorphic photonics into a viable and useful candidate for accelerating neuromorphic computing