17 research outputs found

    Wide range modulation of synaptic weight in thin-film transistors with hafnium oxide gate insulator and indium-zinc oxide channel layer for artificial synapse application

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    Wide range synaptic weight modulation with a tunable drain current was demonstrated in thin-film transistors (TFTs) with a hafnium oxide (HfO2-x) gate insulator and an indium-zinc oxide (IZO) channel layer for application to artificial synapses in neuromorphic systems. The drain current in these TFTs was reduced significantly by four orders of magnitude on application of a negative gate bias, then could be restored to its original value by applying a positive bias. The reduced drain current under negative biasing is interpreted as being caused by voltage-driven oxygen ion migration from the HfO2-x gate insulator to the IZO channel, which reduces the oxygen vacancy concentration in the IZO channel. In addition to emulating the analog-type potentiation and depression motions in artificial synapses, the tunable drain current presents paired-pulse facilitation and short-term and long-term plasticity behaviors. These wide-ranging and nonvolatile synaptic behaviors with tunable drain currents are indicative of the potential of the proposed TFTs for artificial synapse applications

    Post-annealing temperature-dependent electrical properties of thin-film transistors with a ZnO channel and HfOx gate insulator deposited by atomic layer deposition

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    Electrical properties of an oxide semiconductor thin-film transistor (TFT) with a ZnO channel layer and a HfOx gate insulator, both of which are deposited by atomic layer deposition (ALD), are investigated at varying post-annealing temperatures. The TFTs that are post-annealed at 250 and 300 degrees C show relative low on/off ratios < 10(2). They also have a counter-clockwise hysteresis in the transfer curves with slightly reduced threshold voltage upon repeatedly applying a positive gate voltage. However, the transfer curves of the devices post-annealed at 350 degrees C exhibit the increased on/off ratios > 10(2)and clockwise hysteresis with a little increased threshold voltage due to electron charging at the trap states in the HfOx/ZnO interface or inside the HfOx gate insulator. The threshold voltage shift, however, is negligible at the gate voltage of +20 V and as low as about 2.2 V at the highest gate voltage of +40 V, which guarantees stable operations of TFTs without significant degradation of electrical performance. The channel mobilities are around 4.0 cm(2)V(-1)s(-1)at this annealing temperature range. The presented results report the dependence of electrical performance such as on/off ratio and electrical instability, possibly caused by electrical charging, on the post-annealing temperature, which requires post-annealing at 350 degrees C or higher temperatures for stable operations of TFTs with ALD-ZnO and HfOx

    Nonvolatile Memory and Artificial Synaptic Characteristics in Thin-Film Transistors with Atomic Layer Deposited HfOx Gate Insulator and ZnO Channel Layer

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    Nonvolatile memory and synaptic characteristics in thin-film transistors (TFTs) with HfOx gate insulator and ZnO channel are investigated for the application to nonvolatile memory and artificial synapse in neuromorphic systems. Nonvolatile change of drain current induced by modulated gate stack properties is demonstrated to be applicable to nonvolatile memory operation. It also emulates synaptic weight change for learning and memory functions in artificial synapses. The TFTs with HfOx and ZnO layers deposited by sputtering or atomic layer deposition (ALD) at low temperatures exhibit tunable drain current upon applying gate pulses, featuring analog, reversible, nonvolatile changes with respect to pulse amplitude, width, interval, and repetition number. However, the TFTs with HfOx and ZnO by ALD at high temperatures show negligible change. The structural and chemical analyses reveal similarities in defective nature of sputter-deposited and low-temperature ALD HfOx and ZnO layers, leading to analogous drain current modulation. Also, the results of temperature- and voltage polarity-dependent drain current changes and capacitance changes verify that the drain current modulation is driven by oxygen ion migration associated with defective states of HfOx and ZnO layers. It demonstrates feasibility of application of ALD-HfOx/ZnO TFTs to nonvolatile memory and artificial synapses using modulated gate stack properties

    Nonvolatile reversible capacitance changes through filament formation in a floating-gate metal-oxide-semiconductor capacitor with Ag/CeOx/Pt/HfOx/n-Si structure

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    Nonvolatile and reversible capacitance changes are demonstrated in a floating-gate metal-oxide-semiconductor (FG-MOS) capacitor with a Ag-control-gate/CeOx-control-oxide/Pt-floating-gate/HfOx-tunneling-oxide/n-Si structure. Different from the conventional floating-gate MOS field-effect-transistor (MOSFET) operating with a threshold voltage shift by electrical charging in the floating-gate (charge storage node), the proposed device operates with the change of gate oxide capacitance as one of the parameters determining the electrical properties of MOSFET. Applying positive voltage to the Ag control-gate forms a conducting filament in the Ag/CeOx/Pt stack and consequently increases the gate oxide capacitance. The accumulation capacitance increases from the capacitance of serial capacitors consisting of Ag/CeOx/Pt and Pt/HfOx/n-Si before the filament formation to that of a single capacitor of Pt/HfOx/n-Si after the filament formation. The capacitance is reversibly decreased to the initial value by rupturing the filament upon applying negative voltage. The change of capacitance is stable over time with the retention >90% for 12h of measured time. These noncharge-storage-based nonvolatile and reversible changes in the gate oxide capacitance through the filament formation would modulate the MOSFET properties with the advantages of better uniformity, superior immunity to the radiation, and less cross talk between adjacent devices for the application to nonvolatile memory and programmable logic devices

    Synaptic behaviors of thin-film transistor with a Pt/HfOx/n-type indium-gallium-zinc oxide gate stack

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    We report a variety of synaptic behaviors in a thin-film transistor (TFT) with a metal-oxide-semiconductor gate stack that has a Pt/HfOx/n-type indium-gallium-zinc oxide (n-IGZO) structure. The three-terminal synaptic TFT exhibits a tunable synaptic weight with a drain current modulation upon repeated application of gate and drain voltages. The synaptic weight modulation is analog, voltage-polarity dependent reversible, and strong with a dynamic range of multiple orders of magnitude (>10(4)). This modulation process emulates biological synaptic potentiation, depression, excitatory-postsynaptic current, paired-pulse facilitation, and short-term to long-term memory transition behaviors as a result of repeated pulsing with respect to the pulse amplitude, width, repetition number, and the interval between pulses. These synaptic behaviors are interpreted based on the changes in the capacitance of the Pt/HfOx/n-IGZO gate stack, the channel mobility, and the threshold voltage that result from the redistribution of oxygen ions by the applied gate voltage. These results demonstrate the potential of this structure for three-terminal synaptic transistor using the gate stack composed of the HfOx gate insulator and the IGZO channel layer

    A Pt/ITO/CeO2/Pt memristor with an analog, linear, symmetric, and long-term stable synaptic weight modulation

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    Analog synaptic weight modulation that is linear, symmetric, and exhibits long-term stability is demonstrated by the resistance changes in a Pt/indium-tin-oxide (ITO)/CeO2/Pt memristor. Distinct from a Pt/CeO2/Pt memristor without the ITO layer, which shows highly nonlinear and asymmetric resistance changes, the Pt/ITO/CeO2/Pt memristor exhibits linear and symmetric resistance changes in proportion to the number of voltage applications with opposite polarities for potentiation and depression behaviors. The Pt/CeO2/Pt memristor also displays high long-term stability of modulated synaptic weight over time, which originates from the ITO layer acting as a reservoir of oxygen ions drifted from the CeO2 layer to retain the resistance change. Comparison of the results for the Pt/CeO2/Pt and Pt/ITO/CeO2/Pt memristors confirms the role of ITO in the linearity, symmetry, and long-term stability of the resistance change in CeO2-based memristors for use as artificial synapses in neuromorphic systems

    Single- and double-gate synaptic transistor with TaOx gate insulator and IGZO channel layer

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    We demonstrate single- and double-gate synaptic operations of a thin-film transistor (TFT) with double-gate stack consisting of an Al-top-gate/SiOx/TaOx/n-IGZO on a SiO2/n(+)-Si-bottom-gate substrate. This synaptic TFT exhibits a tunable drain current, mimicking synaptic weight modulation in the biological synapse, upon repeatedly applying gate and drain voltages. The drain current modulation features are analog, voltage-polarity dependently reversible, and strong with a dynamic range of multiple orders of magnitude (similar to 10(4)). These features occur as a consequence of the changes in mobility of the IGZO channel, gate insulator capacitance, and threshold voltage. The drain current modulation responsive to the timing of the voltage application emulates synaptic potentiation, depression, paired-pulse facilitation, and memory transition behaviors depending on the voltage pulse amplitude, width, repetition number, and interval between pulses. The synaptic motions can be realized also by a double-gate operation that separately tunes the channel conductance by top-gate biasing and senses it by bottom-gate biasing. It provides the modulated synaptic weight with a wide level of synaptic weight through the read condition using a bottom-gate stack without read- disturbance. These results verify the potential application of TaOx/IGZO with single- and double-gate operations to artificial synaptic devices
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