Nuclear proliferation and the stability-instability paradox

This thesis tests the theory that nuclear proliferation might enhance strategic stability by making the use of military force between possessors of nuclear weapons unlikely. It discusses the existing literature on deterrence and nonproliferation, emphasizing the stability-instability paradox. The stability- instability paradox offers an alternative to the optimism of deterrence logic, which views nuclear weapons as a beneficial and stabilizing force, and the pessimism of nonproliferation, which foresees dire consequences in the spread of nuclear weapons. The paradox is a synthesis of deterrence and nonproliferation logic because it allows for the coexistence of nuclear peace and lower levels of conventional war. Three cases of nuclear rivalry are examined. They are the United States and the Soviet Union, the Soviet Union and the People's Republic of China, and India and Pakistan. These cases provide evidence that challenges the Waltzian argument that nuclear weapons enhance international stability by forbidding violent response to confrontations between nuclear-armed states. Nuclear powers that have employable conventional forces at their disposal, a territorial interest at stake, and exist in a condition of nuclear stalemate can, and do, engage in conventional warfare.http://archive.org/details/nuclearprolifera1094531401NANAU.S. Navy (U.S.N.) author

Enhanced Software for Scheduling Space-Shuttle Processing

The Ground Processing Scheduling System (GPSS) computer program is used to develop streamlined schedules for the inspection, repair, and refurbishment of space shuttles at Kennedy Space Center. A scheduling computer program is needed because space-shuttle processing is complex and it is frequently necessary to modify schedules to accommodate unanticipated events, unavailability of specialized personnel, unexpected delays, and the need to repair newly discovered defects. GPSS implements constraint-based scheduling algorithms and provides an interactive scheduling software environment. In response to inputs, GPSS can respond with schedules that are optimized in the sense that they contain minimal violations of constraints while supporting the most effective and efficient utilization of space-shuttle ground processing resources. The present version of GPSS is a product of re-engineering of a prototype version. While the prototype version proved to be valuable and versatile as a scheduling software tool during the first five years, it was characterized by design and algorithmic deficiencies that affected schedule revisions, query capability, task movement, report capability, and overall interface complexity. In addition, the lack of documentation gave rise to difficulties in maintenance and limited both enhanceability and portability. The goal of the GPSS re-engineering project was to upgrade the prototype into a flexible system that supports multiple- flow, multiple-site scheduling and that retains the strengths of the prototype while incorporating improvements in maintainability, enhanceability, and portability

Runtime Reconfiguration of Multiprocessors Based on Compile-Time Analysis

Purnaprajna M, Porrmann M, Rückert U, Hussmann M, Thies M, Kastens U. Runtime Reconfiguration of Multiprocessors Based on Compile-Time Analysis. ACM Transactions on Reconfigurable Technology. 2010;3(3):1-25.In multiprocessors, performance improvement is typically achieved by exploring parallelism with fixed granularities, such as instruction-level, task-level, or data-level parallelism. We introduce a new reconfiguration mechanism that facilitates variations in these granularities in order to optimize resource utilization in addition to performance improvements. Our reconfigurable multiprocessor QuadroCore combines the advantages of reconfigurability and parallel processing. In this article, a unified hardware-software approach for the design of our QuadroCore is presented. This design flow is enabled via compiler-driven reconfiguration which matches application-specific characteristics to a fixed set of architectural variations. A special reconfiguration mechanism has been developed that alters the architecture within a single clock cycle. The QuadroCore has been implemented on Xilinx XC2V6000 for functional validation and on UMC’s 90nm standard cell technology for performance estimation. A diverse set of applications have been mapped onto the reconfigurable multiprocessor to meet orthogonal performance characteristics in terms of time and power. Speedup measurements show a 2-11 times performance increase in comparison to a single processor. Additionally, the reconfiguration scheme has been applied to save power in data-parallel applications. Gate-level simulations have been performed to measure the power-performance trade-offs for two computationally complex applications. The power reports confirm that introducing this scheme of reconfiguration results in power savings in the range of 15-24%