23 research outputs found

    Bounded Model Checking for Parametric Timed Automata

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    Abstract. The paper shows how bounded model checking can be ap-plied to parameter synthesis for parametric timed automata with con-tinuous time. While it is known that the general problem is undecidable even for reachability, we show how to synthesize a part of the set of all the parameter valuations under which the given property holds in a model. The results form a complete theory which can be easily applied to parametric verification of a wide range of temporal formulae – we present such an implementation for the existential part of CTL −X. 1 Introduction and related work The growing abundance of complex systems in real world, and their presence in critical areas fuels the research in formal specification and analysis. One of the established methods in systems verification is model checking, where the system is abstracted into the algebraic model (e.g. various versions of Kripke structures

    Selected Methods of Model Checking Using SAT and SMT-Solvers

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    Model checking of java programs using networks of fadds

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    In the paper we present the current theoretical base of the J2FADD tool, which translates a Java program to a network of finite automata with discrite data (FADDs).The reason for building the tool is that to model check a concurrent program writ-ten in Java by means of the tools like Uppaal or VerICS (the module VerICS ), an automata model of the Java program must be build first. This is because these tools verify only systems modeled as networks of automata, in particular, systems modeled as networks of FADDs. We also make an attempt to evaluate the J2FADD tool by comparison of it with the two well known Java verification tools: Bandera and Java PathFinder

    SAT-based bounded model checking for timed interpreted systems and the RTECTLK properties

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    We define an SAT-based bounded model checking (BMC) method for RTECTLK (the existential fragment of the real-time computation tree logic with knowledge) that is interpreted over timed models generated by timed interpreted systems. Specifically, we translate the model checking problem for RTECTLK to the model checking problem for a variant of branching temporal logic (called EyCTLK) interpreted over an abstract model, and we redefine an SAT-based BMC technique for EyCTLK

    On the SMT-based verification of communicative commitments

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    We propose an SMT-based bounded model checking (BMC) technique for the existential fragments of CCTL*K – an epistemic temporal logic extended to include modalities for different social commitments – and for multi-agent systems modelled by Communication Interpreted Systems (CIS). Furthermore, we exemplify the use of the technique by means of the NetBill protocol, a popular example in the MAS literature related to the modelling of business processes

    SAT-based searching for k-quasi-optimal runs in weighted timed automata

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    In the paper we are concerned with an optimal cost reachability problem for weighted timed automata, and we use a translation to SAT to solve the problem. In particular, we show how to find a run of length k ∈ IN that starts at the initial state and terminates at a state containing a target location, its total cost belongs to the interval [c,c+1), for some natural number c ∈ IN, and the cost of each other run of length k, which also leads from the initial state to a state containing the target location, is greater or equal to c. This kind of runs is called k-quasi-optimal. We exemplify the use of our solution to the mentioned problem by means of the air traffic control problem, and we provide some preliminary experimental results

    Verifying RTECTL properties of a train controller systems

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    In the paper we deal with a classic concurrency problem - a faulty train controller system (FTC). In particular, we formalize it by means of finite automata, and consider several properties of the problem, which can be expressed as formulae of a soft real-time branching time temporal logic, called RTECTL. Further, we verify the RTECTL properties of FTC by means of SAT-based bounded model checking (BMC) method, and present the performance evaluation of the BMC method with respect to the considered problem. The performance evaluation is given by means of the running time and the memory used

    A GPGPU–based simulator for prism: statistical verification of results of PMC

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    We describe a GPGPU–based Monte Carlo simulator integrated with Prism. It supports Markov chains with discrete or continuous time and a subset of properties expressible in PCTL, CSL and their variants extended with rewards. The simulator allows an automated statistical verification of results obtained using Prism’s formal methods
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