Design Automation Model for Application-Specific Processors on Reconfigurable Fabric

The process of embedded system design on reconfigurable architectures needs smart solutions to reduce development life-cycle and to use resources efficiently at run-time. Current solutions are insufficient to enable the embedded system designer to reflect the flexibility that a reconfigurable architecture can offer. Some of the basic problems are lack of flexible operator definitions, very detailed hardware abstraction procedures, a few or no constraints for tasks or loops at the high-level of design abstraction. In this paper, we propose a new model for automated design of application-specific processors in run-time reconfigurable architectures, solving the aforementioned inefficiency problems. Based on the proposal, a design language, a framework and a compiler have also been developed