Simulations of Analog Circuit Building Blocks based on Radiation and Temperature-Tolerant Sic Jfet Technologies

This work demonstrates design of analog circuit blocks using radiation-hardened and temperature tolerant silicon carbide enhancement and depletion JFET. Most of the work to date in silicon carbide is focused on CMOS like circuits, which are less temperature tolerant, compared to JFETs. In this work, efforts have been made to accurately model silicon carbide depletion and enhancement mode n-JFETs. I-V characteristics of the models were simulated for different values of channel thickness and doping concentration. Analog circuit building blocks such as current mirrors and sources are presented for both enhancement mode and depletion mode JFETs at different temperatures. A source coupled differential amplifier was designed using depletion mode silicon carbide n-JFETs. Various differential amplifier specifications such as Voltage swing, input common mode range (ICMR), differential gain, common mode gain and Common mode rejection ratio (CMRR) are simulated at room temperature and at 673K