25 GHz and 28 GHz Wide Tuning Range 130 nm CMOS VCOs with Ferroelectric Varactors

Two 130nm CMOS VCOs with ferroelectric varactors are presented. The cross-coupled VCO-cores are flip-chip mounted on silicon carriers with integrated inductors and tunable ferroelectric varactors. The output frequency of the first VCO is tunable from 23.4 GHz to 26.1 GHz, corresponding to a tuning range of 11 %. The phase noise of this VCO, tuned to its center frequency, measures -117 dBC/Hz at 1 MHz offset and the power consumption is 18 mW. The second VCO is tunable from 25.8 GHz to 30.5 GHz, corresponding to a tuning range of 17 %. The phase noise at center frequency for this design measures -109 dBc/Hz and the power consumption is 5.3 mW

Microwave CMOS LNAs and VCOs - Using Passives On-Chip, Above Chip, and Off-Chip

The performance of LNAs and VCOs is of large importance to the complete wireless communications system. To achieve sufficient performance in microwave applications, LNAs and VCOs have therefore up to now mostly been manufactured in advanced and expensive semiconductor technologies. In this thesis it is shown, however, that by using a standard CMOS technology, combined with different packaging and post processing techniques, it is now possible to achieve both excellent microwave performance and low cost. The rapid technology advancements have lately made CMOS an attractive alternative for RF/microwave applications. The high fT and fmax, the low minimum noise figure, and the excellent integration capabilities are all in favor of modern CMOS technology. The improved high frequency performance of MOS transistors is primarily a result of gate length scaling, but also strongly depends on process and layout optimization. To design state-of-the-art RF/microwave circuits, a thorough understanding of device physics and transistor models is thus necessary. These issues are therefore investigated, particularly focusing on small-dimension effects and high frequency modeling. While device speed and minimum noise factor improve with scaling, the 1/f noise and linearity trends are less obvious. The expected impact of technology scaling on the performance of LNAs and VCOs is therefore also discussed. If noise performance is the main focus of the design, the quality-factor (Q) of the passive components can be as important as the performance of the transistors. If inductors are realized using the standard interconnect layers of the CMOS process, the strong coupling to the conductive substrate results in a reduced Q-factor. The Q-factor can therefore be improved by placing the inductors higher above the conducting substrate, using post-processing with thick BCB and top metal, or by moving them off-chip and integrating them on a carrier. Both principles are evaluated in this thesis. For VCOs oscillating at frequencies well above 10 GHz, the semiconductor varactor, rather than the inductor, limits the phase noise performance. Varactors based on ferroelectric films have very high Q-factors at these frequencies, but unfortunately the technology is not yet compatible with the IC fabrication process. In this thesis, designs based on CMOS dies flip-chip mounted on carriers with ferroelectric varactors have therefore been evaluated. The seven papers included in this work show the potential of CMOS for LNA and VCO design at microwave frequencies. They also investigate the potential of alternative packaging methods, as the passive components are placed either on-chip, above chip, or off-chip. Papers III, IV, V, and VII demonstrate LNAs operating from 5 GHz to 20 GHz, and in Papers I, II, and VI, VCOs operating up to 30 GHz are presented. Several of the designs show state-of-the-art performance

A 0.6 V l .6 mW fully integrated voltage-controlled oscillator in 90 nm CMOS aiming for the GPS LI band

A fully integrated 0.6 V 2.6 mA VCO aimed for the GPS L1 band is realized in a 90 nm CMOS process. The VCO operates at 6.3 GHz and a divide-by-four circuit buffer provide the wanted 1575.42 MHz signal. The VCO has a measured phase noise of-103 dBc/Hz at 100kHz offset and a chip area of 1.15mm 2, including bondpads

An ultra low voltage, low power, fully integrated VCO for GPS in 90 nm RF-CMOS

A fully integrated 0.6 V VCO for the GPS L1 band is realized in a 90 nm RF-CMOS process. The purpose of the design is to demonstrate how suitable deep submicron CMOS transistors are for ultra low voltage, low power oscillator design. The VCO operates at 6.3 GHz and a divide-by-four circuit buffer provide the wanted 1575.42 MHz signal. Measured phase noise is for a 0.6 V supply voltage and bias current of 2.6 mA - 122 dBc/Hz at 1 MHz offset, measured for a 1.58 GHz carrier. The phase noise of the VCO has been measured for different bias point showing good agreement between measured results and theory

A 15 GHz and a 20 GHz low noise amplifier in 90 nm RF CMOS

The design and measured performance of two low-noise amplifiers at 15 GHz and 20 GHz realized in a 90 nm RF-CMOS process are presented in this work. The 15 GHz LNA achieves a power gain of 12.9 dB, a noise figure of 2.0 dB and an input referred third-order intercept point (IIP3) of -2.3 dBm. The 20 GHz LNA has a power gain of 8.6 dB, a noise figure of 3.0 dB and an IIP3 of 5.6 dBm. Compared to previously reported designs, these two LNAs show lower noise figure at lower power consumption

A highly integrated heterogeneous micro- and mm-wave platform

A highly integrated platform for micro- and mmwave frequency applications is introduced. The platform utilizes heterogeneous process modules with integrated passive and tunable devices together with silicon and GaAs MMIC technology to achieve outstanding flexibility. The different process modules are accounted for and their feasibility is proven through a number of application demonstrators from 23GHz telecom backhauling and 77GHz automotive radar indicating excellent performance. \ua9 2010 IEEE

A highly integrated heterogeneous micro- and mm-wave platform

A highly integrated platform for micro- and mmwave frequency applications is introduced. The platform utilizes heterogeneous process modules with integrated passive and tunable devices together with silicon and GaAs MMIC technology to achieve outstanding flexibility. The different process modules are accounted for and their feasibility is proven through a number of application demonstrators from 23GHz telecom backhauling and 77GHz automotive radar indicating excellent performance. \ua9 2010 IEEE

Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors

Wafer-level packaging (WLP) technology offers novel opportunities for the realization of high-quality on-chip passives needed in RF front-ends. This paper demonstrates a thin-film WLP technology on top of a 90-nm RF CMOS process with one 15-GHz and two low-power 5-GHz voltage-controlled oscillators (VCOs) using a high-quality WLP or above-IC inductor. The 5-GHz VCOs have a power consumption of 0.33 mW and a phase noise of - 115 dBc/Hz and -111 dBc/Hz; at 1-MHz offset, respectively, and the 15-GHz VCO has a phase noise of -105 dBc/Hz at 1-MHz offset with a power consumption of 2.76 mW