CMUT array design and fabrication for high frequency ultrasound imaging

High frequency ultrasound imaging is utilized in a broad range of applications from intravascular imaging to small animal imaging for preclinical studies. Capacitive micromachined ultrasonic transducers (CMUTs) possess multiple preferable characteristics for high frequency imaging systems, such as simpler fabrication methods, simpler integration to electronics, and greater variety of array geometries. Adequate performance and optimization of CMUT based systems require a comprehensive analysis of multiple design parameters. This research utilizes a nonlinear lumped model, capable of simulating the pressure output, electrical input-output, and echo response to a planar reflector of CMUT arrays with arbitrary membrane shape and array geometry, to determine the performance limitations of high frequency CMUT arrays and the effect of different design parameters on its performance. Receiver performance is analyzed through parameters extracted from simulations, namely, thermal mechanical current noise, plane wave pressure sensitivity, and pressure noise spectrum. Transmitter performance is analyzed through pressure output simulation, and the overall performance is analyzed through the simulated pulse-echo response from a perfect planar reflector and the thermal mechanical current noise limited SNR. It is observed that the frequency response is dominated by two vibroacoustic limiting mechanisms: Bragg’s scattering, determined by array lateral dimensions, and crosstalk actuated fundamental and antisymmetric array modes, determined by individual membrane dynamics. Based on the limiting mechanism frequencies, a simplified design methodology is developed and used to design two CMUT array sets covering a broad frequency range of 1-80MHz. These CMUT arrays are fabricated and their limiting mechanisms are experimentally verified through pressure and admittance measurement and simulation comparison. CMUT arrays for guidewire IVUS application are implemented and successfully interfaced with ASICs to demonstrate imaging at 40MHz. Considering that CMUT array performance is also susceptible to the electrical termination conditions, the simulation model is utilized to investigate the effect of different impedance matching scenarios. Receiver performance of the integrated CMUT array and termination circuitry is analyzed through the system’s SNR and acoustic reflectivity.Ph.D

Monolithic integration of Si nanowires with metallic electrodes: NEMS resonator and switch applications

The challenge of wafer-scale integration of silicon nanowires into microsystems is addressed by developing a fabrication approach that utilizes a combination of Bosch-process-based nanowire fabrication with surface micromachining and chemical-mechanical-polishing-based metal electrode/contact formation. Nanowires up to a length of 50 mu m are achieved while retaining submicron nanowire-to-electrode gaps. The scalability of the technique is demonstrated through using no patterning method other than optical lithography on conventional SOI substrates. Structural integrity of double-clamped nanowires is evaluated through a three-point bending test, where good clamping quality and fracture strengths approaching the theoretical strength of the material are observed. Resulting devices are characterized in resonator and switch applications-two areas of interest for CMOS-compatible solutions-with all-electrical actuation and readout schemes. Improvements and tuning of obtained performance parameters such as resonance frequency, quality factor and pull-in voltage are simply a question of conventional design and process adjustments. Implications of the proposed technique are far-reaching including system-level integration of either single-nanowire devices within thick Si layers or nanowire arrays perpendicular to the plane of the substrate