Real-time Data Flow Control for CBM-TOF Super Module Quality Evaluation

Super module assembled with MRPC detectors is the component unit of TOF (Time of Flight) system for the Compressed Baryonic Matter (CBM) experiment. Quality of super modules needs to be evaluated before it is applied in CBM-TOF. Time signals exported from super module are digitalized at TDC (Time to Digital Converter) station. Data rate is up to 6 Gbps at each TDC station, which brings a tremendous pressure for data transmission in real time. In this paper, a real-time data flow control method is designed. In this control method, data flow is divided into 3 types: scientific data flow, status data flow and control data flow. In scientific data flow, data of each TDC station is divided into 4 sub-flows, and then is read out by a parallel and hierarchical network, which consists of multiple readout mother boards and daughter boards groups. In status data flow, status data is aggregated into a specific readout mother board. Then it is uploaded to DAQ via readout daughter board. In control data flow, control data is downloaded to all circuit modules in the opposite direction of status data flow. Preliminary test result indicated data of STS was correctly transmitted to DAQ with no error and three type data flows were control orderly in real time. This data flow control method can meet the quality evaluation requirement of supper module in CBM-TOF

A Wrapper of PCI Express with FIFO Interfaces based on FPGA

This paper proposes a PCI Express (PCIE) Wrapper core named PWrapper with FIFO interfaces. Compared with other PCIE solutions, PWrapper has several advantages such as flexibility, isolation of clock domain, etc. PWrapper is implemented and verified on Vertex -5-FX70T which is a development board provided by Xilinx Inc. Architecture of PWrapper and design of two key modules are illustrated, which timing optimization methods have been adopted. Then we explained the advantages and challenges of on-chip interfaces technology based on FIFOs. The verification results show that PWrapper can achieve the speed of 1.8Gbps (Giga bits per second).Comment: 5 pages, 8 figure

ERSVC: An Efficient Routing Scheme for Satellite Constellation Adapting Vector Composition

AbstractCompared with GEO and MEO satellites, LEO satellite constellation is able to provide low-latency, broadband communications which is difficult to be provided by the GEO or MEO satellites. However, one of the challenges in LEO constellation is the development of an efficient and specialized routing scheme. This paper takes transmission rate and data transmission time into consideration, and proposes ERSVC, an efficient routing scheme for satellite constellation adapting vector composition. ERSVC reduces routing table computation complexity, and saves restricted satellite resources. By adapting vector composition method, the amount of data flowing into satellite constellation is maximized while the data traffic is well controlled. Correlative and comprehensive simulation indicates that ERSVC is superior to existing schemes for LEO satellite constellation, especially in balancing data flow