Occlusions of the Operational Sequence: a coincidental conversation between Robert Matthew and André Leroi-Gourhan in six diagrams

In the 1960s, with western narratives of technical progress at their height, Robert Matthew, then president of the Royal Institute of British Architects, and anthropologist André Leroi-Gourhan independently advocated totalising, systematic and technical models of human progress. Each model a reflection of the aims and methods of their own discipline: for the anthropologist, the evolution ofHomo sapiensfromHomo faberand the dissolving of human/technological boundaries; for the architect, a “collective welfare-socialism” and the systematisation of its built manifestations. Each of these models made manifest, I argue, through profoundly influential diagrams. Leroi-Gourhan’schaîne opératoiredescribes the manufacture of pre-historic stone tools, whilst the RIBA’s Plan of Work describes the design and construction of buildings. Through the embodied objects and processes of these diagrams this paper sees “chaîne” and “Plan” engaging in a kind of reciprocating exchange: a diagrammed conversation revealing, for each discipline, processes occluded or overlooked in the other

RRAM Reliability/Performance Characterization through Array Architectures Investigations

The reliability and performance characterization of each non-volatile memory technology requires the thorough investigation of dedicated array test structures that mimic the real operations of a fully functional integrated product. This makes no exception also for emerging non-volatile memories like the Resistive Random Access Memory (RRAM) concept. An extensive electrical characterization activity performed on test vehicles manufactured in a CMOS backend-of-line process allowed the first glance estimation of operation modes and reliability threats typical of this technology. In this paper, it is provided a review of the most important issues like forming instabilities, optimal set/reset operation finding, and read disturb to provide a guideline either for a further technology optimization or an efficient algorithms co-design to handle these reliability/performance threats

Performance and reliability comparison of 1T-1R RRAM arrays with amorphous and polycrystalline HfO2

In this work, a comparison between 1T-1R RRAM 4kbits arrays manufactured either with amorphous or polycrystalline HfO2 in terms of performance, reliability, Set/Reset operations energy requirements, intra-cell and inter-cell variability during 10k Set/Reset cycles is reported. Polycrystalline array shows higher current ratio, lower switching voltages, lower power consumption, minor endurance degradation and higher overall yield than amorphous array. The drawbacks are represented by the higher Forming voltage, the larger read current distribution after Forming and the higher Reset voltage dispersion

Reliability and Cell-to-Cell Variability of TAS-MRAM arrays under cycling conditions

The impact of 500k write cycles on 1kbits TASMRAM arrays has been evaluated by extracting a set of characteristic parameters describing the technology in terms of cell-to cell variability and switching reliability. The relationship between switching voltages and cell resistances has been investigated in order to define the most reliable working conditions

Assessing the forming temperature role on amorphous and polycrystalline HfO2-based 4 kbit RRAM arrays performance

The impact of temperature during the forming operation on the electrical cells performance and the post-programming stability were evaluated in amorphous and polycrystalline HfO2-based arrays. Forming (between − 40 and 150 °C), reset and set (at room temperature) operations were applied using the incremental step pulse with verify algorithm (ISPVA). The improvements achieved on the forming operation in terms of time and voltages reduction do not impact the subsequent reset/set results. ISPVA perturbations in LRS/HRS current distributions are almost negligible after the first reset/set operation. In this study the best improvement in forming operation in terms of yield, voltage values and cell-to-cell variability is achieved in polycrystalline samples at 80 °C

Electrical characterization and modeling of pulse-based forming techniques in RRAM arrays

The forming process, which corresponds to the activation of the switching filament in Resistive Random Access Memory (RRAM) arrays, has a strong impact on the cells’ performances. In this paper we characterize and compare different pulse forming techniques in terms of forming time, yield and cell-to-cell variability on 4 kbits RRAM arrays. Moreover, post-forming modeling during Reset operation of correctly working and over formed cells has been performed. An incremental form and verify technique, based on a sequence of trapezoidal waveforms with increasing voltages followed by a verify operation that terminates when the expected switching behavior has been achieved, showed the best results. This procedure narrows the post-forming current distribution whereas reducing the Reset switching voltage and the operative current. These advantages materialize in a better control of the cell-to-cell variability and in an overall time and energy saving at the system level

Automated characterization of TAS-MRAM test arrays

In this work the characterization results of 1kbit TAS-MRAM arrays obtained through RIFLE Automated Test Equipment of 1Kbit array are reported. Such ATE, ensuring flexibility in terms of signals and timing, allowed evaluating hysteresis and to perform 50k write cycles in a very limited time, getting a first insight on TAS-MRAM arrays performance and reliability

Relationship among Current Fluctuations during Forming, Cell-To-Cell Variability and Reliability in RRAM Arrays

In this work, cells behavior during forming is monitored through an incremental pulse and verify algorithm on 4kbit RRAM arrays. This technique allows recognising different cell behaviors in terms of read-verify current oscillation: the impact of these oscillations on reliability and cell-to-cell variability has been investigated during 1k endurance cycles and 100k pulse stress under a variety of cycling conditions. Conductance histograms for the post-forming current reveal the nanosized nature of the filamentary paths across the dielectric film

Radiation hard design of HfO2 based 1T1R cells and memory arrays

In this work the electrical performance of a Rad-Hard designed 1T-1R device based on the combination of an Enclosed Layout Transistor (ELT) and a TiN/HfO2/Ti/TiN based resistor is presented for the first time. Moreover, an architectural solution for 1Mbit radiation hard RRAM array implementation is proposed

Electrical characterization and modeling of 1T-1R RRAM arrays with amorphous and poly-crystalline HfO2

In this work, a comparison between 1T-1R RRAM arrays, manufactured either with amorphous or poly-crystalline Metal–Insulator–Metal cells, is reported in terms of performance, reliability, Set/Reset operations energy requirements, intra-cell and inter-cell variability during 10k endurance cycles and 100k read disturb cycles. The modeling of the 1T-1R RRAM array cells has been performed with two different approaches: (i) a physical model like the Quantum Point Contact (QPC) model was used to find the relationship between the reliability properties observed during the endurance and the read disturb tests with the conductive filament properties; (ii) a compact model to be exploited in circuit simulations tools which models the I–V characteristics of each memory cells technology