Spiers Memorial Lecture: Molecular mechanics and molecular electronics

We describe our research into building integrated molecular electronics circuitry for a diverse set of functions, and with a focus on the fundamental scientific issues that surround this project. In particular, we discuss experiments aimed at understanding the function of bistable [2]rotaxane molecular electronic switches by correlating the switching kinetics and ground state thermodynamic properties of those switches in various environments, ranging from the solution phase to a Langmuir monolayer of the switching molecules sandwiched between two electrodes. We discuss various devices, low bit-density memory circuits, and ultra-high density memory circuits that utilize the electrochemical switching characteristics of these molecules in conjunction with novel patterning methods. We also discuss interconnect schemes that are capable of bridging the micrometre to submicrometre length scales of conventional patterning approaches to the near-molecular length scales of the ultra-dense memory circuits. Finally, we discuss some of the challenges associated with fabricated ultra-dense molecular electronic integrated circuits

Preparation and Properties of Polymer-Wrapped Single-Walled Carbon Nanotubes

Intimate electrical contact occurs between a substituted poly(metaphenylenevinylene) (PmPV) and bundles of single‐walled nanotubes (SWNT) as evidenced by atomic force microscopy, optical, and electronic measurements carried out on single, isolated SWNT/PmPV structures (see picture). PmPV may provide a useful route toward “functionalizing” the SWNT without destroying their electrical character

A 160-kilobit molecular electronic memory patterned at 10^(11) bits per square centimetre

The primary metric for gauging progress in the various semiconductor integrated circuit technologies is the spacing, or pitch, between the most closely spaced wires within a dynamic random access memory (DRAM) circuit. Modern DRAM circuits have 140nm pitch wires and a memory cell size of 0.0408 μm^2. Improving integrated circuit technology will require that these dimensions decrease over time. However, at present a large fraction of the patterning and materials requirements that we expect to need for the construction of new integrated circuit technologies in 2013 have ‘no known solution’. Promising ingredients for advances in integrated circuit technology are nanowires, molecular electronics and defect-tolerant architectures, as demonstrated by reports of single devices and small circuits. Methods of extending these approaches to large-scale, high-density circuitry are largely undeveloped. Here we describe a 160,000-bit molecular electronic memory circuit, fabricated at a density of 10^(11) bits cm^(-2) (pitch 33 nm; memory cell size 0.0011 mm^2), that is, roughly analogous to the dimensions of a DRAM circuit projected to be available by 2020. A monolayer of bistable, [2]rotaxane molecules 10 served as the data storage elements. Although the circuit has large numbers of defects, those defects could be readily identified through electronic testing and isolated using software coding. The working bits were then configured to form a fully functional random access memory circuit for storing and retrieving information

Thermoelectric Properties of Bismuth and Silicon Nanowires

Thermoelectric materials convert temperature differences into electricity and vice versa. Such materials utilize the Seebeck effect for power generation and the Peltier effect for refrigeration. In the Seebeck effect, a temperature gradient across a material causes the diffusion of charged carriers across that gradient, thus creating a voltage difference between the hot and cold ends of the material. Conversely, the Peltier effect explains the fact that when current flows through a material a temperature gradient arises because the charged carriers exchange thermal energy at the contacts. Thermoelectrics perform these functions without moving parts and they do not pollute. This makes them highly reliable and more importantly attractive as renewable energy sources, especially at a time when global warming is a growing concern. However, thermoelectrics find only limited use because of their poor efficiency. The efficiency of a thermoelectric material is determined by the dimensionless figure of merit,ZT = S²σT/κ , where S is the thermoelectric power, defined as the thermoelectric voltage, V, produced per degree temperature difference ΔT , σ is the electrical conductivity, κ is the thermal conductivity, and T is the temperature. To maximize ZT, S must be large so that a small temperature difference can create a large voltage, σ must be large in order to minimize joule heating losses, and κ must be small to reduce heat leakage and maintain a temperature difference. Maximizing ZT is challenging because optimizing one physical parameter often adversely affects another. The best commercially available thermoelectric devices are alloys of Bi2Te3 and have a ZT of 1 which corresponds to a carnot efficiency of ~10%. My research has focused on achieving efficient thermoelectric performance from the single component systems of bismuth and silicon nanowires. Bismuth nanowires are predicted to undergo a semi-metal to semiconductor transition below a size of 50 nm which should increase the thermopower and thus ZT. Limited experimental evidence by other groups has been acquired to support this claim. Through electric field gating measurements and by tuning the nanowire size, we have shown that no such transition occurs. Instead, surface states dominate the electric transport at a size smaller than 50 nm and bismuth remains a semimetal. Bulk silicon is a poor thermoelectric due to its large thermal conductivity. However, silicon nanowires may have a dramatically reduced thermal conductivity. By varying the nanowire size and impurity doping levels, ZT values representing an approximately 100-fold improvement over bulk silicon are achieved over a broad temperature range, including a ZT ~ 1 at 200K. Independent measurements of S, σ, and κ, combined with theory, indicate that the improved efficiency originates from phonon effects. The thermal conductivity is reduced and the thermopower is enhanced. These results are expected to apply to other classes of semiconductor nanomaterials.</p

High Density n-Si/n-TiO2 Core/Shell Nanowire Arrays with Enhanced Photoactivity

There are currently great needs to develop low-cost inorganic materials that can efficiently perform solar water splitting as photoelectrolysis of water into hydrogen and oxygen has significant potential to provide clean energy. We investigate the Si/TiO2 nanowire heterostructures to determine their potential for the photooxidation of water. We observed that highly dense Si/TiO2 core/shell nanowire arrays enhanced the photocurrent by 2.5 times compared to planar Si/TiO2 structure due to their low reflectance and high surface area. We also showed that n-Si/n-TiO2 nanowire arrays exhibited a larger photocurrent and open circuit voltage than p-Si/n-TiO2 nanowires due to a barrier at the heterojunction

Boletín oficial de la provincia de Cáceres: Número 151 - 1937 Julio 07

We describe a general method for producing ultrahigh-density arrays of aligned metal and semiconductor nanowires and nanowire circuits. The technique is based on translating thin film growth thickness control into planar wire arrays. Nanowires were fabricated with diameters and pitches (center-to-center distances) as small as 8 nanometers and 16 nanometers, respectively. The nanowires have high aspect ratios (up to 106), and the process can be carried out multiple times to produce simple circuits of crossed nanowires with a nanowire junction density in excess of 1011 per square centimeter. The nanowires can also be used in nanomechanical devices; a high-frequency nanomechanical resonator is demonstrated