Online prognosis for priority power supply restoration

Automatic monitoring of the vulnerability of the power supply to a high-priority facility has important practical considerations. As opposed to the well studied optimization task for power supply restoration which is carried out after a fault has happened, the task of analyzing the restorability of a high-priority line under possible fault conditions is a decision problem that has to be solved periodically as the load conditions in the network change. The outcome of this decision problem may be used to alert the high-priority facility about the vulnerability of the state of the network, in the sense that some faults may cause a non-restorable outage to the line supplying that facility. This paper studies the prognosis of a high-priority line in a network in terms of power supply restorability and proposes the first method for this problem

A study of modeling techniques in use in digital and mixed-signal domains for semi-formal verification

Simulation-based techniques are the defacto standard for the verification of industrial designs. Since verification effort takes about 70% of the time of the design phase, it is important to expedite the simulation process in order to reduce the overall verification effort. Modeling-based techniques play an important role towards achieving the speed-up by expediting many subtasks of the overall verification process. In this paper we present a study of the different modeling techniques that are primarily used for semi-formal verification of modern-day industrial digital and mixed-signal designs and the efficacy of the same for achieving the verification speed-up

Chassis: a platform for verifying pmu integration using autogenerated behavioral models

Power Management Units (PMUs) are large integrated circuits consisting of many predesigned mixed-signal components. PMU integration poses a serious verification problem considering the size of the integrated circuit and the complexity of analog simulation. In this article we present an approach for automatic generation of behavioral models for PMU components from top-down skeleton models, fitted with parameter values estimated by bottom-up parameter extraction algorithms. It is shown that replacing PMU components with these autogenerated hybrid automata-based abstract behavioral models enables significant simulation speedup (> 20X on our industrial test cases) and helps in early detection of integration errors. The article also justifies the level of accuracy in our models with respect to the goal of verifying integrated PMUs. The approach presented in this work is implemented in the form of a tool suite called Chassis

A formal approach for specification-driven AMS behavioral model generation

Behavioral models for analog and mixed signal (AMS) designs are developed at various levels of abstraction, using various types of languages, to cater to a wide variety of requirements, ranging from verification, design space exploration, test generation, and application demonstration. In this paper we present a high-level formalism for capturing the AMS design intent from the specification and present techniques for automatic generation of AMS behavioral models. The proposed formalism is a language independent one, yet the design intent is modeled at a level of abstraction which enables easy translation into common modeling standards. We demonstrate the translation into VerilogA and SPICE, which are fundamentally different standards for behavioral modeling. The proposed approach is demonstrated using a family of Low Dropout Regulators (LDO) as the reference